Page 241 - Phase-Locked Loops Design, Simulation, and Applications

MIXED-SIGNAL PLL APPLICATIONS PART 1: INTEGER-N FREQUENCY
SYNTHESIZERS Ronald E. Best 144
two values for Q have been chosen such that the corner frequency f /2Q is below f , and the
c
1
0
corner frequency f /2Q is above. Let’s first discuss the high-Q case. The power density
0 2
spectrum of the output phase jitter is obtained by multiplying the appropriate curves in Fig.
6.18a and b. The result is plotted in Fig. 6.18c. For high Q, S θθ,ref m
(f ) is constant versus
frequency for f < f . Under ideal conditions (that is, for a noise figure of F = 1), S (f )
c θθ,ref m dB
approaches −174 dB for a signal power of 1 mW (0 dBm). Below f , S , (f ) increases with
c
θθ ref m
, and below corner frequency f /2Q , it increases with .
0
1
In the low Q case, S , is constant above f /2Q . In the range between f and f /2Q , it
θθ ref 0 2 c 0 1
increases with , and below f it increases with . What we see drastically from Fig.
c
6.18, the resonator Q has a tremendous effect on the oscillator phase jitter. The higher the Q,
the lower the phase jitter. The spectral density of oscillator phase jitter is greatest near the
resonance frequency; this could be expected because the noise gain of the oscillator is
maximum at resonance frequency f .
0
Going back to the synthesizer noise model in Fig. 6.14, we now know how large the phase
jitter θ n,ref could be. But what is the impact of that phase jitter on the synthesizer output θ n,out ?
We know from Sec. 3.3.1 how the PLL reacts on phase signals π (t) applied to the reference
1
input. To compute the output phase signal θ ′(t), we found
2

(6.15)

[cf. Eq. (3.7)]. In the case of the frequency synthesizer, however, we are not interested in
phase jitter θ ′(t) (which appears at the output of the divide-by-N counter), but rather in the
2
phase jitter θ (t) at the output of the VCO. As is easily seen from the block diagram in Fig.
2
2.1, θ and θ ′ are related by θ = θ ′·N. For the power spectral density of the phase jitter
2 2 2 2
at the output of the VCO, we consequently have

(6.16)

Here again, f is the frequency offset from the carrier frequency f . If f lies within the
m
m
0
passband of the PLL (given by B or f ), H(f ) ≈ 1—thus, the synthesizer multiplies the
L 3db m
2
reference phase jitter by N . In the stopband, however, phase jitter is attenuated; the
attenuation depends on the gain roll-off of H(f) at higher frequencies, which will be treated in
greater detail in Chap. 9.
In most cases, the reference oscillator is not directly connected to the phase detector input,
but rather the frequency created by the reference oscillator is scaled down by a reference
divider, as shown, for example, in Fig. 6.2. When the reference divider scales down the
frequency by R, it also attenuates the oscillator phase jitter by R, which decreases the PSD of
2
phase jitter by R . When both ÷R and ÷N dividers are used, the PSD of the VCO output
becomes