Page 117 - Understanding Automotive Electronics
P. 117

2735 | CH 4  Page 104  Tuesday, March 10, 1998  11:06 AM



                4                     MICROCOMPUTER INSTRUMENTATION AND CONTROL




                Information is sent to or   Data is sent to the CPU over a data bus (Figure 4.2). The data bus is
                received from memory   slightly different from the address bus in that the CPU uses it to read
                locations and input/out-  information from memory or peripherals, and to write information to memory
                put devices via the bidi-  or peripherals. Signals on the address bus originate only at the CPU and are sent
                rectional data bus.   to devices attached to the bus. Signals on the data bus can either be inputs to or
                                      outputs from the CPU that are sent or received at the CPU by the data register.
                                      In other words, the data bus is a two-way street while the address bus is a one-
                                      way street.  Another difference is that the data bus in many microcomputers is
                                      only 16 bits wide whereas the address bus is typically 32 bits wide.

                                      Memory Read/Write
                                          The CPU always controls the direction of data flow on the data bus
                                      because, although it is bidirectional, data can move in only one direction at a
                                      time. The CPU provides a special read/write control signal (Figure 4.2) that
                                      tells the memory in which direction the data should flow. For example, when
                                      the read/write (R/W) line is high, the CPU reads information into a memory
                                      location.
                During a memory read      The timing diagram for a memory read operation is shown in Figure 4.3.
                operation, the CPU    Suppose the computer has been given the instruction to read data from memory
                changes the state of the   location number 10. To perform the read operation, the CPU raises the R/W line
                read/write line and puts   to the high level to tell the memory to prepare for a read operation.  Almost
                the appropriate address   simultaneously, the address for location 10 is placed on the address bus (“address
                on the address bus. This   valid” in Figure 4.3). The number 10 in binary (0000 0000 0000 1010) is sent to
                causes the contents of   the memory in the address bus. The binary electrical signals corresponding to 10
                the addressed memory   operate the specific circuits in the memory to cause the binary data at that
                location to be placed on   location to be placed on the data bus. The CPU has an internal register that is
                the data bus, where it   activated during this read operation to receive and store the data. The data is then
                can be read by the CPU.  processed by the CPU during the next cycle of operation according to the
                                      relevant instruction.
                                      Timing
                Microcomputers use a      A certain amount of time is required for the memory’s address decoder to
                timing signal, called a   decode which memory location is called for by the address, and also for the
                clock, to determine when   selected memory location to transfer its information to the data bus. To allow
                data should be written to   time for this decoding, the processor waits a while before receiving the
                or read from memory.  information requested from the data bus. Then, at the proper time, the CPU
                                      opens the logic gating circuitry between the data bus and the CPU data
                                      register so that the information on the bus from memory location 10 is latched
                                      into the CPU. During the memory read operation, the memory has temporary
                                      control of the data bus. Control must be returned to the CPU, but not before
                                      the processor has read in the data. The CPU provides a timing control signal,
                                      called the clock, that tells the memory when it can take and release control of
                                      the data bus.



                104                   UNDERSTANDING AUTOMOTIVE ELECTRONICS
   112   113   114   115   116   117   118   119   120   121   122