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54 Chapter 3
Figure 3.1: A simplified view of the AArch64 architecture.
The AArch64 architecture provides a set of registers that can be used by programmers
to store data. There are a limited number of registers, so large programs must store data
in memory most of the time, and bring that data into a CPU register to be processed. Re-
sults of the processing must be moved back to memory to free up registers to process more
data.
3.2 AArch64 user registers
As shown in Fig. 3.2, the AArch64 ISA provides 31 general-purpose registers, which are
called X0 through X30. These registers can each store 64 bits of data. To use all 64 bits,
they are referred to as x0 through x30 (capitalization is optional). To use only the lower
(least significant) 32 bits, they are referred to as w0-w30. Since each register has a 64-bit
name and a 32-bit name, we use R0 through R30 to specify a register without specifying the
number of bits. For example, when we refer to R12, we are really referring to either x12 or
w12.
