Page 73 - ARM 64 Bit Assembly Language

58 Chapter 3

3.2.7 Program counter

The program counter, pc, always contains the address of the next instruction that will be ex-
ecuted. The processor increments this register by four, automatically, after each instruction
is fetched from memory. By moving an address into this register, the programmer can cause
the processor to fetch the next instruction from the new address. This gives the programmer
the ability to jump to any address and begin executing code there. Only a small number of
instructions can access the pc directly. For example instructions that create a PC-relative ad-
dress, such as adr, and instructions which load a register, such as ldr, are able to access the
program counter directly.

3.3 Instruction components

The AArch64 processor supports a relatively small set of instructions grouped into four basic
instruction types. Many instructions have optional modifiers, which results in a very rich pro-
gramming language. The following sections give a brief overview of the components which
are common to instructions in each category. The individual instructions are explained later in
this chapter, and in the following chapter.

3.3.1 Setting and using condition flags

As mentioned previously, PSTATE contains four flag bits (bits 28–31), which can be used
to control whether or not certain instructions are executed. Most of the data processing in-
structions have an optional modifier to control whether or not the flag bits are set when the
instruction is executed. For example, the basic instruction for addition is add. When the
add instruction is executed, the result is stored in the destination register, but the flag bits in
PSTATE are not affected.

However, the programmer can add the s modifier to the add instruction to create the adds in-
struction. When it is executed, this instruction will affect the NZCV flag bits in PSTATE.The
flag bits can be used to control subsequent branch instructions. The meaning of the flags
depends on the type of instruction that was most recently used to set the flags. Table 3.1
shows the names and meanings of the four bits depending on the type of instruction that set
or cleared them. Many logical and arithmetic instructions support the s modifier to control
setting the flags.