Page 78 - ARM 64 Bit Assembly Language
P. 78

Load/store and branch instructions 63

                     Unsigned Immediate Scaled Offset: [Xn|sp, <imm12>]
                           The unsigned immediate offset (which may only be zero or positive) is scaled and then
                           added to the contents of Xn or sp. If the register being loaded or stored is a 64-bit regis-
                           ter, then the immediate value is scaled by shifting it left three bits. Likewise, if the load
                           or store is 32-bits, the immediate value is scaled by shifting it left two bits. For half-
                           word loads and stores, the offset is scaled by shifting left by one bit, and for byte loads
                           and stores, no scaling occurs.
                           Note that the syntax for this addressing mode is the same as the syntax for Signed
                           Immediate Offset mode, but the set of possible immediate values is different. The
                           programmer does not need to worry about which mode is used. The programmer just
                           specifies the offset as an immediate value. The Assembler will automatically select
                           whether to use Signed Immediate Offset or Unsigned Immediate Scaled Offset mode
                           depending on the immediate offset value that is specified.
                           The result of adding the scaled offset to the base register is used as the address of the
                           item to be loaded or stored. For example, the following line of code:
                                  ldr     x0, [x1, #0x7ff8]
                           calculates a memory address by adding 0x7ff8 to the contents of register x1.Itthen
                           loads eight bytes of data, starting at the calculated memory address, into register x0.
                           Similarly, the line:
                                  str     w0, [x1, #0x3ffc]
                           adds 0x3ffc to the contents of x1 and uses that as the address where it stores the 4 bytes
                           of x0 in memory.
                     Pre-indexed Immediate Offset: [Xn|sp, #±<imm9>]!
                           The memory address is computed by adding the unshifted, signed 9-bit immediate to
                           the number stored in Xn or sp. Then, Xn is set to contain the memory address. This
                           mode can be used to step through elements in an array, updating a pointer to the next
                           array element before each element is accessed.
                     Post-indexed Immediate Offset: [Xn|sp], #±<imm9>
                           Register Xn or sp is used as the address of the value to be loaded or stored. After the
                           value is loaded or stored, the value in Xn is updated by adding the unshifted immediate
                           offset, which may be negative or positive. This mode can also be used to step through
                           elements in an array, updating a pointer to point at the next array element after each one
                           is accessed.
                     Register Offset: [Xn|sp, Rm, <option>]
                           Rm is extended or shifted, then added to Xn or sp. The result is used as the address of
                           the item to be loaded or stored. For example,
                                  ldr     x3, [x2, x1, lsl #3]
   73   74   75   76   77   78   79   80   81   82   83