Page 83 - ARM 64 Bit Assembly Language
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68 Chapter 3



                1         ldursb  x4, [x5, #255]
                  Store the double-word value in x1 to Mem[x2 - 256]:


                1         stur    x1, [x2, #-256]


                  3.4.3 Load/store pair

                  These instructions are used to store or load two registers at a time. This can be useful for mov-
                  ing registers onto the stack or for copying data. These two instructions are particularly useful
                  for transferring data in a load-store architecture because each instruction can move twice as
                  much information as the ldr and str instructions.

                  ldp   Load Pair, and
                  stp   Store Pair.

                  3.4.3.1 Syntax

                       <op>{<size>}      Rt, Rt2, <addr>


                  •  <op> is either ldp or stp.
                  •  <size> is optionally sw for signed words.
                  •  <addr> is 7 bits Pre-indexed, Post-indexed, or Signed immediate.
                  •  Signed immediate Xt range: [-0x200, 0x1f8]. Wt range: [-0x100, 0xfc].


                  3.4.3.2 Operations

                   Name     Effect                               Description
                   ldp      Rt ← Mem[addr]                       Load register pair from memory at
                            Rt2 ← Mem[addr+size(Rt)]             addr where sizeof(Rt) is 4 for Wt
                                                                 registers and 8 for Xt registers
                   stp      Mem[addr] ← Rt                       Store register pair in memory at addr
                            Mem[addr+size(Rt)] ← Rt2


                  3.4.3.3 Examples

                  The stp and ldp instructions are commonly used at the beginning of a function, and at the
                  end of a function. For example, the following instruction allocates sixteen bytes on the stack
                  by decrementing the stack pointer. Then it stores the frame pointer (x29)at Mem[sp] (the
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