Page 56 - An Introduction to Microelectromechanical Systems Engineering
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Basic Process Tools                                                            35

                  of silicon dioxide), it is polycrystalline. Epitaxy is a widely used step in the fabrica-
                  tion of CMOS circuits and has proven efficient in forming wafer-scale p-n junctions
                  for controlled electrochemical etching (described later).
                      The growth occurs in a vapor-phase chemical-deposition reactor from the
                  dissociation or hydrogen reduction at high temperature (>800ºC) of a silicon-
                  containing source gas. Common source gases are silane (SiH ), dichlorosilane
                                                                             4
                  (SiH Cl ), or silicon tetrachloride (SiCl ). Nominal growth rates are between 0.2
                      2  2                            4
                  and 4 µm/min, depending on the source gas and the growth temperature. Impurity
                  dopants are simultaneously incorporated during growth by the dissociation of a
                  dopant source gas in the same reactor. Arsine (AsH ) and phosphine (PH ), two
                                                                  3                    3
                  extremely toxic gases, are used for arsenic and phosphorous (n-type) doping,
                  respectively; diborane (B H ) is used for boron (p-type) doping.
                                         2  6
                      Epitaxy can be used to grow crystalline silicon on other types of crystalline
                  substrates such as sapphire (Al O ). The process is called heteroepitaxy to indicate
                                              2  3
                  the difference in materials. Silicon-on-sapphire (SOS) wafers are available from a
                  number of vendors and are effective in applications where an insulating or a
                  transparent substrate is required. The lattice mismatch between the sapphire
                  and silicon crystals limits the thickness of the silicon to about one micrometer.
                  Thicker silicon films suffer from high defect densities and degraded electronic
                  performance.


                  Oxidation
                  High-quality amorphous silicon dioxide is obtained by oxidizing silicon in either
                  dry oxygen or in steam at elevated temperatures (850º–1,150ºC). Oxidation mecha-
                  nisms have been extensively studied and are well understood. Charts showing final
                  oxide thickness as function of temperature, oxidizing environment, and time are
                  widely available [1].
                      Thermal oxidation of silicon generates compressive stress in the silicon dioxide
                  film. There are two reasons for the stress: Silicon dioxide molecules take more vol-
                  ume than silicon atoms, and there is a mismatch between the coefficients of thermal
                  expansion of silicon and silicon dioxide. The compressive stress depends on the
                  total thickness of the silicon dioxide layer and can reach hundreds of MPa. As a
                  result, thermally grown oxide films cause bowing of the underlying substrate.
                  Moreover, freestanding membranes and suspended cantilevers made of thermally
                  grown silicon oxide tend to warp or curl due to stress variation through the thick-
                  ness of the film.

                  Sputter Deposition
                  In sputter deposition, a target made of a material to be deposited is physically
                  bombarded by a flux of inert-gas ions (usually argon) in a vacuum chamber at a pres-
                  sure of 0.1–10 Pa. Atoms or molecules from the target are ejected and deposited onto
                  the wafer. There are several general classes of sputter tools differing by the ion exci-
                  tation mechanism. In direct-current (dc) glow discharge, suitable only for electrically
                  conducting materials, the inert-gas ions are accelerated in a dc electric field between
                  the target and the wafer. In planar RF, the target and the wafer form two parallel
                  plates with RF excitation applied to the target. In ion-beam deposition (also known
                  as ion milling), ions are generated in a remote plasma, then accelerated at the target.
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