Page 114 - Analog Circuit Design Art, Science, and Personalities

Milton Wilcox

on any chip made with the same fabrication process is called cell-based design.
Cells are a seductive concept, and the basis for the explosion of application specific
integrated circuits, or ASICs. Imagine only having to design and debug a circuit
block once arid then forever being able to use it to create new ICs without any further
design effofi! It is a concept which all but the most savvy of management have
embraced wholeheartedly.
I wish it were that easy. Unfortunately, analog circuits don’t always cooperate
with the cell concept, as our example will illustrate. The problem is that in analog
there are invariably slightly different requirements for a givcn functional block
from ASIC to ASIC. A comparator, for example, may need a little more speed or
output drive or common mode range or . . .
in our thermal detector cell the difference involved biasing. Along with signal
inputs and signal outputs, analog IC cells typically have bias inputs which receive
voltages or currents from centralized bias generators on the chip. This prevents
needless duplication of biasing. The thermal detector circuit had originally been
designed for continuous application of the bias signals; that is, the thermal detector
would be biased and operating at all times that a supply was applied to the chip.
However, in the FET driver chip, the bias signals were to be turned off and on by
the inpu! signal in order to minimize standby supply current. This was not a minor
difference and proved to be the seed of problems to come.
So how should the analog designer handle this case of using a cell in almost
but not quitc its intended application? Like a totally new design. The smallest of
changes can have a way of rippling through an analog circuit, often with dire conse-
quences. For a thermal detector cell which is to be switched off and on, a prudent
approach would be to start by evaluating the detector in the ’off’ state (which in this
case had not becn a previous concern). Ncxt, one would want to thoroughly investi-
gate the detector response as bias is simultaneously applied to the the diodes, refer-
ence. and comparator. It’s not obvious that there would be a problem, but then it’s
not obvious that there would not be. Having to modif>/ or even completely redesign
an analog cell to meet the particular requirements of the chip it is going into is
alway.; a real possibility. I assumed that thc thermal detector circuit had passed this
additional scrutiny since no circuit modifications were incorporated for the FET
drivcr chip.
Readying an integrated circuit for inask layout is a spccial challenge since the
analog circuit designer cannot be certain that the intended circuit has been created
until the IC comes out. This applies equally to cell based layouts and custom layouts;
the xime cclls reused from a previous chip may or may not yield the samc results.
Again, the only actual circuit is the one which has thc exxl device geometries and
physica: cell placcments of the new IC itself. And the Pact that the IC components
ail have parasitics associated with supply, ground, and each other can change the
actuat circuit very much indeed.
Thus again, the need for attention to detail, and for taking the time to anticipatc
all of the consequences of a particular device placement. Play “what ir’: What if I
put this transistor in the same island with that resistor? What if I place this op-amp
cell ncxi to the protection cell for that pad? What if the transistor saturates‘? What if
the pad goes below ground‘? Invent every kind of scenario you can think oi, because
I guarantee every analog circuit has the potential to behave quite differently than
you expected.
Let’s return now to the three thermal sensing diodes. Although I can‘t be certain,
I would gucss that somewhcre near the end of layout of our FET driver chip the
mask designer was running out of space on the layout. This mask designer, being a