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ENERGY CONTROL AND SOFTWARE 171
Power Supply Voltage
Most low-power processor chips designed for energy-efficient systems can function
with very low voltages. We’ll see why this is important when we discuss CMOS logic.
2
Suffice it to say that energy consumption is proportional to V . This square law of
physics pays us great dividends as we move to lower and lower voltage systems. If we
can cut the voltage in half, the energy consumption goes down by a factor of 4!
Varying Voltage
Further, some processors can function while the power supply voltage varies. If the
processor has this feature, we can take advantage of it in the following way. Because
higher voltages can charge up capacitances in the logic chips faster, the computer can
run faster at higher voltages. If the computer has little to do, we can lower the voltage
and decrease the clock frequency, and the energy draw goes way down. As long as the
processor can get its work done in the allotted time, then the robot will function prop-
erly and all is well. In the mean time, a great deal of energy will be saved.
To take advantage of this feature, the power supply must be under software control.
It must initialize to a suitable voltage and then provide the proper controls that will
enable the computer software to alter the processor power supply voltage to acceptable
levels. It’s possible to get by with a single digital input that alters the power supply volt-
age. Just make sure that the slew rate of the power supply voltage (the first derivative)
is small enough and remains within the limits the processor can accept.
Varying Clock
Processors can be built out of CMOS. All logic families have a basic building block
called an inverter. The CMOS inverter is special in that it does not enable the current to
flow except when it changes state. Thus, if a CMOS inverter stays static as logic one or
logic zero, it will not use energy. However, when it changes state, the capacitance within
the inverter must be charged up (changing to a 1) or discharged (changing to a 0). When
this happens, a distinct amount of energy is used up in the capacitance of the inverter.
The energy in this capacitance is
Ecap 0.5 C V 2
where V is the power supply voltage and C is the capacitance of the CMOS logic
inverter gate.