Page 187 - Anatomy of a Robot

07_200256_CH07/Bergren 4/10/03 3:30 PM Page 172
172 CHAPTER SEVEN
Since this amount of energy is dumped every time the CMOS inverter changes state,
the power exerted is proportional to
2
P Ecap f 0.5 C V f
where f is the frequency of the processor clock.
Since the capacitance C is fixed by the CMOS process, it’s clear that our best hope
for power savings is to decrease V and f. Some modern processors are built to withstand
this. Changing their power supply voltage and changing their clock frequency will
decrease their power consumption.
Care must be taken, however, that the processor clock is not used for any fixed fre-
quency processes within the robot. Communication interfaces, for example, often
require a special fixed frequency for operations. Make sure these interfaces have their
own fixed clock frequency. The central clock of the system can first feed into these
communication interfaces and then it can be divided down for the processor. Some
processors have all this clock division circuitry internal to the processor.
The voltage and the clock can be ramped up and down to fit the workload of the
processor. Figure 7-3 shows the method of ramping voltage or the clock up and down,
and the relative effect on the processor performance. The same amount of work gets
done in the second graph, but since the voltage is half, the power dissipation for that

Compute activity, V is high

Time

Compute activity, V is low

Time
FIGURE 7-3 A computer can save energy by running longer at a lower
voltage.