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Appendix H Recursive Procedures
H.1 Recursion
H.2 Activation Tree Representation
H.3 Stack Processing
H.4 Recursion and Iteration
Appendix I Additional Instruction Pipeline Topics
I.1 Pipeline Reservation Tables
I.2 Reorder Buffers
I.3 Scoreboarding
I.4 Tomasulo’s Algorithm
Appendix J Linear Tape Open Technology
Appendix K DDR SDRAM
Glossary 740
References 750
Index 763
