Page 477 - DSP Integrated Circuits

462 Chapter 11 Processing Elements

where W^ is the word length and wi is a weight associated with each digit. In a
positional number system, the weight wi depends only on the position of the digit
xi. In conventional number systems the weight wi is the iih power of a fixed inte-
ger r— i.e., wi = T*. Such number systems are called fixed-radix systems. The digits
have to satisfy 0 < xi < r - I.
Generally, a number can have an integer and a fractional part. This is done by
letting the k leftmost digits represent the integer part and the W^-k remaining dig-
its represent the fractional part. For example, the binary representation of the num-
ber x with k = 2 is XQXi.X2...x~w d _ i- This corresponds to instead using the weights
k
Wd
w^ = rk-i-i Th e Weight of the least significant digit is Q = w^ d _ i = r ~ . Notice
that the radix point is not stored; its position is only understood. Such numbers are
called fixed-point numbers. Generally, a fixed-point number is written from left to
right with the most significant bit (MSB) at the far left, and the least-significant bit
(LSB) to the far right.
There are two distinct forms of fixed-point arithmetic: integer and fractional.
In integer arithmetic the right-hand part is considered to be most "important." For
example, multiplication of two integer values yields a product with twice as long a
word length. If the word length needs to be reduced to the original length, the
right-hand part is kept and the left-hand part is dropped. An error occurs only if
the product is too large, but the error will be very large if it occurs.
In fractional fixed-point arithmetic, the numbers may be considered to be in
the range 1 <x <l. Hence, the product will be in the same range. The word length
is reduced by keeping the left- and dropping the right-hand part. This will result
in a small error in the quantized product.
Conversely, a number in floating-point arithmetic is described by a signed man-
±ex
tissa and a signed exponent,—e.g., ±m 2 P. The magnitude of the mantissa is usu-
ally normalized to the interval [0.5,1[. Floating-point arithmetic is used in general-
purpose computers to handle values that vary over a large range. In most DSP
algorithms, however, the necessary signal range can be made small by appropriate
scaling of the signal levels. Moreover, good signal processing algorithms tend to
generate low round-off noise and use the available signal range well.
An advantage of fractional fixed-point arithmetic is that parasitic oscillations
are more easily suppressed than they are in floating-point arithmetic. Fixed-point
arithmetic also requires less chip area and is much faster than floating-point
arithmetic. Hence, in most VLSI circuits for dedicated DSP applications calcula-
tions are done using fractional fixed-point arithmetic.
Performance of the processing elements with respect to speed, chip area, and
power dissipation depends on the number representation used. In this section we
will discuss the following fixed-point representations:

Signed-magnitude representation
One's-complement representation
Two's-complement representation
Binary offset representation

11.2.1 Signed-Magnitude Representation
In signed-magnitude representation the magnitude and sign are represented separately.
The first digit represents the sign and the remaining digits the magnitude. A normalized
W^-hit binary word using signed-magnitude representation represents the value