Page 160 - Engineering Digital Design

CHAPTER 4

Logic Function Representation

and Minimization

4.1 INTRODUCTION

A given logic function can be represented in a variety of different forms, and often one
of these forms proves to be the best for the application under consideration. It is the purpose
of this chapter to consider the different forms of logic representation. It is also the purpose of
this chapter to consider the reduction and minimization of these different forms. Knowing
how to reduce or minimize a logic function is important so as to reduce design area, power
consumption, and cost by eliminating unnecessary hardware. Also, the minimized function
often reveals information that is not readily apparent from a nonminimized form. In short,
the information in this chapter is essential to good design practices and specifically to an
understanding of the remainder of this text.

4.2 SOP AND POS FORMS
Without specific mention of it, SOP and POS forms have already been used in the discussions
of Chapter 3. Typical examples are the defining relations for XOR and EQV given by
Eqs. (3.4) and (3.5) in Section 3.9, where each is given in both SOP and POS form. To
understand what is meant by SOP and POS, the AND operation is taken as the Boolean
product and the OR operation represents the Boolean sum. Thus, SOP means sum-of-
products while POS denotes product-of-sums. These definitions will be used throughout
the text.

4.2.1 The SOP Representation
Consider the function of three variables given by the Boolean expression

/(A, B, O = AB + BC + ABC . (4.1)
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