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Chapter 6          Interconnection with Optics



                          Ray T. Chen and Bipin Bihari
                          MICROELECTRONICS RESEARCH CENTER,
                          THE UNIVERSITY OF TEXAS, AUSTIN

















       6.1. INTRODUCTION

         Extraordinary developments during the last decade in microelectronics
       fabrication technologies have provided the means to achieve submicron feature
       size and accommodate millions of logic gates in a small volume. This shrinking
       feature size in Si VLSI circuits manifests into short transit time and switching
       speeds within the processor chip, allowing extremely fast intrinsic signal speeds.
       However, preserving the integrity of the signals generated by these novel
       devices while communicating among other chips on a system or PC board level
       is becoming extremely difficult by electrical means (i.e., using conventional
       metallic transmission lines and interconnects), and requires employment of
       bulky, expensive terminated coaxial interconnections. High packaging density
       and long on-board communication distances (> 10 cm) make even state-of-the-
       art electrical interconnects unrealistic in some cases [1]. Several critical
       problems exist for electrical interconnects in high-speed, large-area, massive
       signal transmission. These include:

          1. Impedance mismatch caused by multistage electrical fanouts.
         2. Transmission reflection (noise) at each fanout junction as well as at the
            end of each transmission line.
         3. Electromagnetic interference with other interconnection lines and other
            interconnection layers.
         4. High transmission loss resulting in a large driving power [2,3].
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