Page 315 - Introduction to Information Optics

300 6. Interconnection with Optics

These fundamental problems translate into wide interconnection time band-
widths, large clock and signal skews, and large RC time constants. Even the
distributed line RLC time constant is often too large for chip-to-chip intercon-
nects and higher-level hierarchies. These factors are the cause of serious
bottlenecks in the most advanced electronic backplane interconnect proto-
types, such as IBM's backplane, in which the bottleneck occurs at 150
Mbit/sec. For existing high-speed buses, electronic limitations are even more
pronounced. For example, the VMEbus serial bus (VSB) is designed to transfer
data at 3.2 Mbit/sec. However, its speed degrades to 363 Kbits/sec when the
two communication points are separated by 25-m [4].
Sematech and the SIA (Semiconductor Industry Association) have pub-
lished road maps for the growth of electronics industries in the future. Based
on these road maps, even with the advancement of copper wiring and low-K
(dielectric constant) materials, electrical interconnection still is likely to experi-
ence a major bottleneck in the very near future [5]. Finding an optical means
to overcome this problem is a necessity. Implementation of optical components
to provide high-speed, long-distance (> 10 cm) interconnects has already been
a major thrust for many high-performance systems where electrical intercon-
nects failed to provide the bandwidth requirement. GHz personal computers
have already hit consumer markets. However, the slowness of transmitting
signals off the processor chip; for example, processor to memory, makes the
system bus speed (~ 133 MHz) significantly slower than the clock speed. As a
result, the bottleneck is the off-processor interconnection speed rather than the
on-chip clock rate that provides the references for arbitrating the data and
signal processing. Further upgrading the bus speed by electrical means is
difficult.
Continuous increase of bus speed is a challenging task for the microelec-
tronics industry due to the required distance and packing density. The speed
limit becomes more stringent as the interconnection distance increases. For
example, the dispersion-limited 1 GHz speed limit for an electrical interconnect
is confined to lengths not longer than a few millimeters, and the 100 MHz
speed limit holds for an interconnect length of only a few centimeters.
Employing optical interconnects for upgrading system bus speed has been
widely discussed in the computer industry. However, the major concern
regarding incorporating optical bus into high-performance microelectronic
devices and systems such as the board-level system bus is packaging incom-
patibility. Transmission of optical signals can provide tens of Gbit/sec with an
interconnection distance well above 10 cm, which is at least an order of
magnitude higher than electrical interconnects. However, electrical-to-oplical
and optical-to-electrical signal conversions impose serious problems in packag-
ing and in decreasing the latency of data processing. For example, conventional
microelectronic device interfaces may not be easily and inexpensively altered
to incorporate optical interconnects. While the speed advantage promised by