Page 72 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12

2.6 Input/Output Instructions 49

SP - 2 -> SP; PC -> (SP):(SP+1); SP - 2 -> SP; Y -> (SP):(SP+1);
SP - 2 -> SP; X -> (SP):(SP+1); SP - 2 -> SP; B > (SP); A -> (SP+1);
SP - 1 -> SP; CCR -> (SP);
After completion of a handler entered by a hardware interrupt or similar instruction, the
last instruction executed is return from interrupt (RTI). All handlers end in an RTI
instruction. RTI pulls the top nine words from the stack, replacing them in the registers
the interrupt took them from. The RTI instruction executes the operations:
(SP) -> CCR; SP + 1 -> SP (SP) -> B; (SP+1) -> A; SP + 2 -> SP
(SP):(SP+1) -> X; SP + 2 -> SP (SP):(SP+1) -> Y; SP + 2 -> SP
(SP):(SP+1) -> PC; SP + 2 -> SP
You can modify the program in Figure 2.21 to see how the trap instruction saves
and restores the machine state. Replace the BSR instruction at location $807 with ao
SWI instruction whose opcode is $3F (and a NOP, $A7) and the RTS instruction at
location $810 with RTI whose opcode is $OB; put the adddress $80C into locations
$FFF6 and $FFF7; and rerun this program. You should see that changing the registers
inside the trap handler has no effect on the returned values of the registers, because they
are saved on the stack and restored by the RTI instruction.
We have covered both the conditional and unconditional branch instructions. We
have also covered the jump and related instructions together with subroutine branch and
jump instructions. Control instructions provide the means to alter the pattern of fetching
instructions and are the second most common type of instruction. If you use them
wisely, they will considerably enhance the static and dynamic efficiency.

2.6 Input-Output Instructions

The last class of instructions for the 6812, the input-output or I/O class, is easy to
describe because there aren't any! With the 6812 a byte is transferred between an
accumulator and a register in an I/O device through a memory location chosen by
hardware. The LDAA instruction with that location then inputs a byte from the register of
the I/O device to accumulator A, while the STAA instruction with that location does the
corresponding output of a byte. Other instructions, such as MOVE, MOVM, ROL, ROR,
DEC, INC, and CLR, may be used as I/O instructions, depending on the particular device.
We look more closely at all of these issues in Chapter 11.

2.7 Special Instructions

Table 2.10 lists 6812's special instructions, which are arithmetic instructions of primary
interest in fuzzy logic. They use index addressing, which is discussed in the next chapter.
Fuzzy logic uses minimum and maximum functions to logically AND and OR fuzzy
variables. The 6812 has instructions MAXA,MAXM,MINA,MINM, EMAXD, EMAXM,
EMIND, and EMINM to determine the maximum or minimum of an 8-bit or a 16-bit pair
of unsigned numbers, one of which is in a register (A or D) and the other of which is
one or two bytes at the effective address, and to put the maximum or minimum