Page 90 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12

3.3 Relative Addressing And Position Independence 67

will use the sum of accumulator D and the index register X as an effective address to read
two bytes and then use these two bytes as another effective address, to load accumulator
A with the word at the latter address. For instance, if D is clear, X contains the value
$843, location $843 contains $08, and location $844 contains $67, LDAA [ D, X ] will
load the word at $867 into accumulator A. The post byte for indirect D accumulator
index addressing has ones in bits 7 to 5 and 2 to 0, and the index register is specified in
bits 4 and 3 (00 is X, 01 is Y, 10 is SP, and 11 is PC). The post byte for the instruction
LDAA [ D, X ] is $E7. The instruction
LDAA [$12,X]
will use the sum of the 16-bit offset $0012 and the index register X as an address to read
two bytes, use these two bytes as another address, and load accumulator A with the word
at the latter address. Note that even though the offset of this instruction is an 8-bit
number, only 16-bit index addressing is permitted when indirect addressing uses an offset.
For instance, if X contains the value $843, location $855 contains $08, and location
$856 contains $23, LDAA [ $ 12 , X ] will load the word at $823 into accumulator A.
The post byte for indirect 16-bit offset index addressing has ones in bits 7 to 5 and 1 and
0, a zero in bit 2, and the index register is specified in bits 4 and 3 (00 is X, 01 is Y, 10
is SP, and 11 is PC). The post byte for the instruction LDAA [ $ 12, X ] is $E3.
The LEAX, LEAY, and LEAS instructions can use only index addressing modes,
but not index indirect modes. They can be used like a transfer instruction; LEAX 0, Y
will transfer Y to X. More generally, they can be used to add a signed number constant or
variable to an index register and possibly put the result in a different register. The
instruction LEAX -3,X subtracts 3 from index register X, while LEAY A,X adds
accumulator A to the value of X and puts the result in Y. These instructions are
alternatives to arithmetic instructions such as ADDD or SUED and are especially useful
when the result will eventually be put in an index register.
The idea of using a register to form the effective address is very powerful. Several
addressing modes were introduced that use this idea. The index mode doesn't modify the
contents of the register, but can add a 5-, 9-, or 16-bit offset to get the effective address.
The most common change to an address is to increment or decrement it. The instruction
can automatically increment the value in the index register before or after it is used, by
one to eight. This will be quite common in some data structures that we meet later. A
mode that adds the values of an accumulator to the value of an index register permits one
to compute addresses that are derived from two variable values, rather than from a
variable and a fixed value. Finally, these modes may be combined with indirect
addressing for some special applications. With these modes of addressing, the 6812 is a
very powerful microprocessor. With this power, we can show you how to use data
structures intelligently to make your programs shorter, faster, and clearer.

3.3 Relative Addressing and Position Independence

The microcomputer is very much like any other computer; however, the use of ROMs in
microcomputers raises an interesting problem that is met by the last mode of addressing
that we discuss. The problem is that a program may be put in a ROM such that the