Page 89 - Introduction to Microcontrollers Architecture, Programming, and Interfacing of The Motorola 68HC12

66 Chapter 3 Addressing Modes

Figure 3.7. Accumulator Index Address Calculation

Note that these increment and decrement modes produce a side effect. They not only
compute the effective address, they also change the value in the index register used to get
the address. No other addressing mode has such a side effect. We will see how useful
these options are when we look at some examples later in this chapter.
Sometimes, the effective address is the sum of two variable numbers. The index
register can be used to hold one of the variables, and an accumulator, A, B, or D, can
hold the other number, as in LDAB A, X. The sign-extended accumulator (A) is added
to the index register (X) to provide the effective address. The effective address can be
obtained as in Figure 3.7. This is called accumulator indexed addressing.
The contents of the registers A and B are treated as 8-bit two's-complement numbers
in these instructions while the contents of D may be treated as a 16-bit two's-
complement number or an unsigned 16-bit number, because the sum of the contents of D
and the contents of any 16-bit index register, truncated to 16 bits, is the same unsigned
16-bit number in either case. The post byte for accumulator index addressing is as
follows: Bits 7 to 5 and bit 2 are 1, the index register is encoded in bits 4 and 3 (00 is X,
01 is Y, 10 is SP, and 11 is PC), and the accumulator is encoded in bits 1 and 0 (00, A;
01, B; and 11, D). The instruction LDAB A, X is encoded as follows:

Accumulator index addressing modes are useful for reading data out of a vector where
the location of the vector in memory, as well as the vector index, are determined at run
time. Suppose a 10-element vector of 8-bit items has element 0 at $843, element 1 at
$844, element 2 at $845, and so on. Then if X has $843, and accumulator A is 2, then
LDAA A,X

puts element 2 into accumulator A. Suppose now that a 10-element vector of 8-bit items
has element 0 at $872, element 1 at $873, element 2 at $874, and so on. Then if X has
$872, and accumulator A is 2, then this instruction still gets vector element 2.
Finally, indirect addressing can be combined with accumulator D and 16-bit offset
forms of index addressing discussed above. Indirect addressing goes to memory to get the
address of the operand, as we describe with examples below. In the 6812, indirect
addressing may only be used with these two forms of index addressing. The instruction
LDAA [D,X]