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Materials for Microelectromechanical Systems 2-15
or SixNy, thereby enabling the use of poly-Ge as a sacrificial substrate layer in polysilicon surface micro-
machining. Using the above-mentioned techniques, poly-Ge-based thermistors and Si N -membrane-
3 4
based pressure sensors using poly-Ge sacrificial layers have been fabricated [Li et al., 1999]. In addition,
poly-Ge microstructures, such as lateral resonant structures, have been fabricated on Si substrates
containing CMOS structures with no process-related degradation in performance, thus showing the
advantages of low deposition temperatures and compatible wet chemical etching techniques [Franke
et al., 1999].
SiGe is an alloy of Si and Ge and has recently received attention for its usefulness in microelectronics;
therefore, deposition technologies for SiGe thin films are readily available. While the requirements for
SiGe-based electronic devices include single-crystal material, the requirements for MEMS are much less
restrictive allowing for the use of polycrystalline material in many applications. Polycrystalline SiGe
(poly-SiGe) films retain many properties comparable to polysilicon but can be deposited at lower sub-
strate temperatures. Deposition processes include LPCVD, atmospheric pressure chemical vapor deposi-
tion (APCVD), and RTCVD (rapid thermal CVD) using SiH and GeH as precursor gases. Deposition
4 4
temperatures range from 450°C for LPCVD [Franke et al., 2000] to 625°C for RTCVD [Sedky et al., 1998].
The LPCVD processes can be performed in horizontal furnace tubes similar in configuration and size to
those used for the deposition of polyslicon films. In general, the deposition temperature is related to the
concentration of Ge in the films, with higher Ge concentration resulting in lower deposition tempera-
tures. Like polysilicon, poly-SiGe can be doped with B and P to modify its conductivity. In fact, it has
been reported that as-deposited in situ B-doped poly-SiGe films have a resistivity of 1.8mΩ-cm [Franke
et al., 2000].
Poly-SiGe can be deposited on a number of sacrificial substrates, including SiO [Sedky et al., 1998],
2
PSG [Franke et al., 1999], and poly-Ge [Franke et al., 1999], which as already detailed can also be
deposited at relatively low processing temperatures. For films rich in Ge, a thin polysilicon seed layer is
sometimes used on SiO surfaces, as Ge does not readily nucleate on oxide surfaces. Because poly-SiGe is
2
an alloy, variations in film stoichiometry can result in changes in physical properties. For instance, attack
of poly-SiGe by H O , a main component in some Ge etchants, becomes problematic for Ge concentra-
2 2
tions over 70%. As with most CVD thin films, residual stress is dependent on the substrate used and the
deposition conditions; however, for in situ B-doped films, the as-deposited stresses are quite low at
10MPa compressive [Franke et al., 2000].
In many respects, fabrication of devices made from poly-SiGe thin films follows processing methods
used in polysilicon micromachining as Si and Ge are quite compatible. The poly-SiGe/poly-Ge material
system is particularly attractive for surface micromachining, as it is possible to use H O as a release agent.
2 2
It has been reported that in H O , poly-Ge etches at a rate of 0.4 mm/min, while poly-SiGe with Ge con-
2
2
centrations below 80% have no observable etch rate after 40hr [Heck et al., 1999]. The ability to use H O
2 2
as a sacrificial etchant makes the poly-SiGe and poly-Ge combination perhaps the ideal material system
for surface micromachining. To this end, several interesting devices have been fabricated from poly-SiGe.
Due to the conformal nature of the poly-SiGe coating, poly-SiGe-based high-aspect-ratio structural ele-
ments, such as gimbal/microactuator structures made using the Hexil process [Heck et al., 1999], can
readily be fabricated. Capitalizing on the low substrate temperatures associated with the deposition of
poly-SiGe and poly-Ge thin films, an integrated MEMS fabrication process on Si wafers has been demon-
strated [Franke et al., 2000]. In this process, CMOS structures are first fabricated into standard Si wafers.
Poly-SiGe thin-film mechanical structures are surface micromachined atop the CMOS devices using a
poly-Ge sacrificial layer and H O as an etchant. A significant advantage of this design lies in the fact that
2 2
the MEMS structure is positioned directly above the CMOS structure, thus significantly reducing the par-
asitic capacitance and contact resistance characteristic of interconnects associated with the side-by-side
integration schemes often used in integrated polysilicon MEMS. Use of H O as the sacrificial etchant
2
2
means that no special protective layers are required to protect the underlying CMOS layer during release.
Clearly, the unique properties of the poly-SiGe/poly-Ge material system, used in conjunction with the
Si/SiO material system, enable fabrication of integrated MEMS that minimizes interconnect distances
2
and potentially increases device performance.
© 2006 by Taylor & Francis Group, LLC