Page 36 - Mechatronic Systems Modelling and Simulation with HDLs
P. 36

2.5  MODEL VERIFICATION AND VALIDATION                               25


               means of simple manual calculations. They are based upon analytical considerations
               or the results of an initial simulation. The following criteria could possibly be drawn
               upon for plausibility tests:


               Causality The cause should precede effect in reality and in the model. Any devi-
               ation from this principle indicates serious deficits in the model.


               Balance principles The principles of the conservation of energy and matter apply
               not only to the physical reality, but also for the model itself.

               Current/voltage laws Currents, forces and moments at a point add up to zero.
               Voltages and velocities add up to zero in a closed loop. These relationships apply
               for any electronic or mechanical system with concentrated parameters.

               Value range State and output variables and parameters are normally associated
               with an applicable range of values. Although this is not necessarily precisely
               defined, unrealistic values can be recognised very quickly. For example; areas,
               volumes, energies and entropies can never be negative.


               Consistency of units Model equations are generally formulated without units. Nev-
               ertheless, it is often worthwhile using the consistency of units as a criterion for
               verification.


               Verification on the basis of alternative models

               There are often several methods or tools available for modelling and subsequent
               simulation. If two approaches are independent of each other in terms of method-
               ology and realisation, then they can be used for mutual verification. This arises
               because the probability of different errors producing the same effects falls, as
               the number of independent simulation experiments rises. Still simpler is the case
               where an approach has already been verified. In this case verification is established
               directly by means of a sufficient number of experiments, and a comparison between
               the model that has already been verified and the model to be verified. We see from
               this that absolute verification remains limited to a very small number of fields of
               application. In all other cases it is much more a case of deciding how many exper-
               iments must be performed before we are prepared to regard a model as having
               been verified. In this context, moreover, the required degree of correspondence,
               and consequently the accuracy of the model, has to be defined in advance.
                 Let us now illustrate this verification procedure on the basis of a few examples.
               We can use a logic simulator for the simulation of digital circuits, or — when con-
               sidering the underlying transistor circuit — a circuit simulator can also be used.
               In principle, both simulators should deliver the same results, with the circuit
   31   32   33   34   35   36   37   38   39   40   41