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64                      4 MODELLING IN HARDWARE DESCRIPTION LANGUAGES


                                               Hardware
                                              Description
                                               Languages               Specification


                                           library IEEE;
                                           use IEEE.std_logic_1164.all;
                                           entity compare is
                                             port(a, b: in                  Design
                                                    std_logic_vector(0 to 7);
                                                  eq: out
                                                    std_logic);
                                           end compare;
                                           architecture cmp of compare is
                                           begin
                                 ?           eq <= '1' when (a = b)
                                                       else '0' ;
                                           end cmp;                         Simulation
                                      ?
                                             ?
                                                                      Synthesis
                                      #include <stdio.h>
                                      main (argc,argv)
                                      int argc,          Formal
                                      char ** argv,
                                      {
                                       int i,           verification
                                      for (i=1 i<argv, i++){
                                        print ("is\n",argv[i])}
                                      }
                         Figure 4.1 Fields of application of hardware description languages
               stages, which facilitates the validation of the specifications and the verification of
               the designs. In the medium term formal verification or automatic synthesis of
               designs may also be possible, both of which currently tend to be the exclusive
               preserve of digital electronics.
                 Hardware description languages offer a whole range of advantages in relation to
               other approaches. For example, the problem of simulating mixed systems is moved
               from the simulator or programming level to the modelling level. It is thus no longer
               a question of implementing a tool that can execute an appropriate simulation.
               Instead, models have to be developed that describe the components of the system.
               The great advantage of this is that tried and tested simulators are available. This
               means that the corresponding functionalities, such as the building up and solving
               of equation systems, the co-simulation of digital and analogue system components
               or the representation of the results do not need to be re-implemented.
                 The second great advantage of hardware description languages lies in the fact
               that both the behaviour and the structure of a system or component can be for-
               mulated. Furthermore, this can occur on extremely different levels of abstraction.
               This allows hardware description languages to be implemented very flexibly. In
               particular, entire design sequences can be executed almost entirely using hardware
               description languages. This means that each design step primarily represents the
               transformation of one hardware description into another hardware description. This
               avoids undesirable losses due to the need to support various data formats. Further-
               more, it is possible to simulate on all levels at any time and thus immediately
               investigate the correctness of a design step.
                 The most important fields of application of hardware description languages will
               be outlined in the sections that follow. These fields are specification, documenta-
               tion, design, simulation, formal verification and synthesis. Furthermore, the syntax
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