Page 90 - Mechatronic Systems Modelling and Simulation with HDLs

4.6 SIMULATION OF MODELS IN HARDWARE DESCRIPTION LANGUAGES 79

QUANTITY v : velocity; -- Velocity
QUANTITY s : displacement; -- Relative position
CONSTANT g : real := 9.81; -- Gravity
CONSTANT lw: real := 0.1; -- Air resistance
BEGIN
-- Initial conditions ...
BREAK v => 0.0, s => 10.0;
-- Detect discontinuity and invert velocity...
BREAK v => -v WHEN NOT s’ABOVE(0.0);
s’DOT == v; -- v = ds/dt
IF v > 0.0 USE
v’DOT == -g - v**2*lw; -- Accel. = -Gravity - Air resist.

ELSE
v’DOT == -g + v**2*lw; -- Accel. = -Gravity + Air resist.
END USE;
END ARCHITECTURE simple;

Hardware description 4.12 Modelling of discontinuities using the example of a bouncing ball

Modelling in the frequency range

In addition to modelling in the time range we can also provide a description in
the frequency range. This is based upon a small-signal model, which arises as a
result of the linearisation of the equations around the working point. In this model
it is possible to define quantities based upon their spectra. Furthermore, predefined
functions are available that effect either a Laplace or a Z-transformation. In this
manner filters, for example, can be described in a very simple way.

4.6 Simulation of Models in Hardware
Description Languages

In what follows the focus will again lie on the consideration of VHDL-AMS,
which provides a good example of a hardware description language with digital
and analogue components. Thus, we are automatically considering a mixed digital-
analogue simulation. The first step is the performance of the so-called elaboration,
which includes the evaluation of structural sections of the model and thus builds
up a complete system model from the module instantiations. The digital section
consists of a number of processes and the digital simulator core. The analogue
section consists of a number of equations and the analogue solver. A necessary
prerequisite for analogue solvability is that the number of equations and the num-
ber of (analogue) unknowns in the model are equal. For VHDL-AMS this is the
number of THROUGH quantities, free quantities and interface quantities with the
direction OUT. The actual simulation then runs in two phases. In the first phase