Page 182 - A Practical Guide from Design Planning to Manufacturing
P. 182
Microarchitecture 155
Macroinstruction:
ADD Mem(AX), BX # Increment value at memory location AX
by value BX
Microinstructions:
LD R3, Mem(R1) # Load value at memory location R1 into R3
ADD R4, R3, R2 # Add R2 and R3 and place result in R4
STD R4, Mem(R1) # Store R4 at memory location R1
The macroinstruction adds a value to a location in memory. In microin-
structions, which are also called uops, this is performed in three sepa-
rate steps: getting the value from memory, performing the addition,
and storing the result in memory. The processor can more quickly and
efficiently execute programs as uops because the instructions are more
uniform in complexity. When trying to execute CISC macroinstructions
directly, each instruction might access memory once, twice, or not at all.
This makes scheduling and keeping the pipeline full more difficult. As uops,
each instruction either accesses memory once or performs a calculation but
never both. By focusing on optimizing a smaller number of simpler more
uniform instructions, processor performance can be improved. Also, the
form and types of uops can be changed with each new processor design to
suit the microarchitecture while maintaining software compatibility by
consuming the same macroinstructions.
Most CISC architecture macroinstructions can be translated into four or
fewer uops. These translations are performed by decode logic on the proces-
sor. However, some macroinstructions could require dozens of uops. The
translations for these macroinstructions are typically stored in a read-only
memory (ROM) built into the processor called the microcode. The microc-
ode ROM contains programs written in uops for executing complex macroin-
structions. In addition, the microcode contains programs to handle special
events like resetting the processor and handling interrupts and exceptions.
In many ways, the microcode performs the same functions for the proces-
sor as the BIOS ROM does for the system. The BIOS ROM stores device
drivers, which allow the same software to use different computer hardware,
and also contains the code run during reset to initialize the computer. The
microcode ROM allows the same macroinstructions to be executed differ-
ently on processors with different microarchitectures and contains the code
run during reset to initialize the processor. Both the BIOS and microcode
are providing hardware abstraction and initialization.
Each time the computer is reset, the processor first runs the microcode
reset routine. After this is done, initializing the processor, the first pro-
gram it runs is the BIOS ROM reset routine. The BIOS reset program