Page 384 - A Practical Guide from Design Planning to Manufacturing
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354   Chapter Eleven

        debug, and bugs found at this point will impact the time from first sil-
        icon to shipping the product. The expensive and specialized equipment
        of silicon debug is worth it because it reduces this time. Of course, the
        potentially most expensive bugs are those found after shipping has
        already begun. In the worst case, these lead to lost sales and disastrous
        recalls. The intent of all the effort of pre-silicon and post-silicon vali-
        dation is precisely to avoid this type of bug. Missed bugs are often those
        created by extremely unlikely situations and therefore suitable to be
        ignored as errata. Others are fixed in the field by updates to microc-
        ode, BIOS, or the operating system, but every bug found after shipping
        has the potential for disaster. A bug with serious effects that is likely
        to be triggered by commercial software can turn a profitable product
        into an enormous loss. The exact same crisis is created with a bug-free
        design that has not been sufficiently tested for manufacturing defects.
        In the end, the consumer cannot tell the difference between a flawed
        design and an individual flawed die. All they see is a product that
        doesn’t work.
          The huge potential impact of bugs will continue to make rigorous pre-
        silicon and post-silicon validation, as well as a thorough silicon test pro-
        gram, key parts of any successful processor design. The work of silicon
        debug and test is most critical in the days after first silicon and before ship-
        ping has begun, but it never really stops. Even after a stepping has been
        created, which is suitable for sale, there are always improvements that can
        be made. Changes to the design can improve frequency, reduce power, or
        increase manufacturing yield. These changes are far more effective when
        directed by silicon debug rather than simulations. With each new stepping,
        the post-silicon validation must be repeated and any new problems
        debugged. New steppings may also require updates to the silicon test pro-
        gram. Throughout the product lifetime, the tasks of microprocessor design
        never really stop, and the promise of Moore’s law is that there are always
        new design challenges and new possibilities in the future.


        Key Concepts and Terms

        Automatic test equipment (ATE)  First silicon
        Automatic test pattern         Focused ion beam (FIB) edit
        generation (ATPG)              Infrared emissions microscope (IREM)
        Built-in self-test (BIST)      Laser voltage probing (LVP)
        Deadlock, Livelock             Packaged part test
        Defects per million (DPM)      Scan, boundary scan
        Design for test (DFT)          Shmoo
        Electrical test (E-test)       Stuck-at fault
        Errata                         Wafer probe test
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