Page 66 - A Practical Guide from Design Planning to Manufacturing

42 Chapter Two

by requiring the system’s main memory to be used to store video images
rather than dedicated memory on the graphics card.
Performance can be improved with the loss of some flexibility by pro-
viding a separate connection from the processor directly to memory.
The Athlon 64 uses this configuration. Building a memory controller
directly into the processor die reduces the overall latency of memory
accesses. All other traffic is routed through a separate bus that connects
to the Northbridge chip. Because it now interacts directly only with the
graphics card, this type of Northbridge is sometimes called a graphics
tunnel (Fig. 2-2).
Whereas a direct bus from processor to memory improves perform-
ance, the processor die itself now determines which memory standards
will be supported. New memory types will require a redesign of the
processor rather than simply a new chipset. In addition, the two sepa-
rate buses to the processor will increase the total number of package pins
needed.
Another tactic for improving performance is increasing the total
memory bandwidth by interleaving memory. By providing two separate
bus interfaces to two groups of memory modules, one module can be read-
ing out data while another is receiving a new address. The total memory
store is divided among the separate modules and the Northbridge com-
bines the data from both memory channels to send to the processor. One
disadvantage of memory interleaving is a more expensive Northbridge
chip to handle the multiple connections. Another downside is that new
memory modules must be added in matching pairs to keep the number
of modules on each channel equal.

Processor
Processor bus
Memory Processor Memory
(optional)
bus bus
Processor
DRAM bus DRAM
(optional) main
Chipset
memory
Graphics
Graphics bus Northbridge
card
Hub
bus

Southbridge

Figure 2-2 Northbridge (graphics tunnel).