Page 64 - A Practical Guide from Design Planning to Manufacturing

40 Chapter Two

when to send or capture data. Many standards allow one transfer of data
every clock cycle; others allow a transfer only every other cycle, or some-
times two or even four transfers in a single cycle. Buses allowing two
transfers per cycle are called double-pumped, and buses allowing four
transfers per cycle are called quad-pumped. More transfers per cycle
allows for better performance, but makes sending and capturing data
at the proper time much more difficult.
The most important measure of the performance of a bus standard is
its bandwidth. This is specified as the number of data transfers per
second or as the number of bytes of data transmitted per second.
Increasing bandwidth usually means either supporting a wider bus
with more physical wires, increasing the bus clock rate, or allowing
more transfers per cycle.
When we buy a computer it is often marketed as having a particular
frequency, a 3-GHz PC, for example. The clock frequency advertised is
typically that of the microprocessor, arguably the most important, but
by no means the only clock signal inside your computer. Because each
bus standard will specify its own clock frequency, a single computer can
easily have 10 or more separate clock signals.
The processor clock frequency helps determine how quickly the
processor performs calculations, but the clock signal used internally by
the processor is typically higher frequency than any of the bus clocks.
The frequency of the different bus clocks will help determine how quickly
data moves between the different computer components. It is possible
for a computer with a slower processor clock to outperform a computer
with a faster processor clock if it uses higher performance buses.
There is no perfect bus standard. Trade-offs must be made between
performance, cost, and complexity in choosing all the physical and elec-
trical standards; the type of components being connected will have a
large impact on which trade-offs make the most sense. As a result, there
are literally dozens of bus standards and more appearing all the time.
Each one faces the same dilemma that very few manufacturers will
commit to building hardware supporting a new bus standard without
significant demand, but demand is never significant until after some
hardware support is already available.
Despite these difficulties, the appearance of new types of components
and the demand for more performance from existing components steadily
drive the industry to support new bus standards. However, anticipating
which standards will ultimately be successful is extremely difficult, and
it would add significant complexity and risk to the microprocessor design
to try and support all these standards directly. This has led to the creation
of chipsets that support the different bus standards of the computer, so that
the processor doesn’t have to.