Page 199 - Op Amps Design, Applications, and Troubleshooting
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182    OSCILLATORS


                    The current provided by #4 not only cancels the input current provided via
               RI but supplies an equal (but opposite) current to Q. That is, Q will now continue
               to charge at the same linear rate but in the opposite direction. The ramp voltage at
               the output of AI will rise linearly until it exceeds the upper threshold of A 2. Once
               the upper threshold has been exceeded, the output of A 2 switches to the -V SAT
               level. This forces the output of A$ to +V SAT and reverse-biases D 4. We are now back
               to the original circuit state, and the cycle repeats.
                    The frequency of operation is determined by the time it takes Q to charge to
               the threshold levels of A 2. Once the circuit components have been fixed, the only
               thing that determines frequency is the value of input voltage (+V /N). This, of
               course, gives rise to the name voltage-controlled oscillator.
                    A triangle-wave (or double ramp) signal may be taken from the output of A].
               The output of AI provides a square-wave output.

        4.3.2 Numerical Analysis

               Let us now analyze the performance of the circuit in Figure 4.5 numerically. First
               consider the voltage comparator A 2. It has no negative feedback, so we know that
               the output will be driven to one of its two extremes (±V SAT) at all times. For pur-
               poses of this analysis, let us use the typical values of ±13 volts for ±V SAT. The
               threshold voltages for the comparator are determined by the zener diodes (D 1 and
               D 2). Appendix 8 shows that the 1N4735 diodes are designed to regulate at 6,2
               volts. Therefore, when the output is at +F SAr, the upper threshold (V UT) will be
               determined by the regulated voltage of D 2 plus the forward voltage drop of DI. We
               can express this in equation form as






               where V z is the rated zener voltage and V F is the forward voltage drop. In the case
               of the circuit in Figure 4.5, the upper threshold is computed as

                                       YUJ = 6.2V + 0.6 V = 6.8 V

               The lower threshold (V LT) is computed in a similar manner:






               In the present case, we have


                                      V n = -6.2 V- 0.6 V = -6.8V
               These threshold values are particularly important because they will determine the
               charging limits of capacitor Q, which is the heart of the circuit.
                    Now let us evaluate the numerical performance of A 3 and its associated cir-
               cuitry. We will apply the Superposition Theorem and consider the two inputs to
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