Page 188 - Phase-Locked Loops Design, Simulation, and Applications

DESIGN PROCEDURE FOR MIXED-SIGNAL PLLS Ronald E. Best 115
the formula for ζ given in Tables 3.4. Because the sum τ ≥ τ has been computed in step 16,
1 2
τ can now be determined. Strange things may happen at this point: we perhaps obtained τ ≥
1
1
τ = 300 μs in a previous step and computed τ = 400 μs right now! To realize the intended
2 2
system, we would have to choose τ = −100 ms, which is impossible. Whenever we meet that
1
situation, the system cannot be realized with the desired goals (that is, with the desired values
for ω and/or ζ). It only becomes realizable if we choose a lower ω , for example, which
n n
increases τ ≥ τ , or if we specify a lower ζ, which decreases ω . These odd things cannot
2
2
1
happen in case of the current output PFD. Here we simply have to compute τ using the
2
equation for z in Table 3.5.
Step 19. Given τ and τ (plus eventually K ), the components of the loop filter can be
2
1
a
determined. We first discuss the procedure for the case where not a current-output PFD is
applied. If the passive lead-lag filter is chosen, we have R C = τ and R C = τ (refer to Fig.
1 1
2
1
2 1
2.17a). C can be chosen arbitrarily; it should be specified such that we get “reasonable”
1
values for R and R —in other words, in the range of kOhms to MOhms. For the active lead-
1
2
lag filter (Fig. 2.19a), we have K = C /C , τ = R C , and τ = R C . Here, we should first
a 1 2 1 1 1 2 2 2
specify C in order to get a reasonable value for R . Then we would compute C from K =
1
a
1
2
C /C , and finally we would compute R from τ = R C . For the active PI filter (Fig. 2.21a),
1 2 2 2 2 2
we have R C = τ and R C = τ . As with the passive lead-lag filter, we would first select C 1
1
2 1
2
1 1
to get reasonable values for R and R .
1
2
When the current output PFD is used, capacitor value C has already been computed in step
1
17 or 22. Only resistor R has to be determined now from τ = C R .
1 2
2
2
Step 20. The procedure is identical for both types of PFD. Given the pull-out range Δω PO
and damping factor ζ, the formula for Δω PO in Table 3.4 or 3.5 is used to calculate the natural
frequency ω . The design proceeds with step 22.
n
Step 21. The procedure is identical for both types of PFD. Given the lock-in time T , the
L
natural frequency ω is calculated from the formula for T in Tables 3.4 or 3.5. The procedure
n L
continues with step 22.
Step 22. When the voltage output PFD is used, the sum of both time constants τ ≥ τ is
1
2
computed from the given natural frequency ω , using the equation for ω in Table 3.4. When
n n
the current output PFD is used, however, we are going to calculate the value of capacitor C 1
from the given natural frequency ω , using the equation for ω in Table 3.5. The design
n n
proceeds with step 18.
To make things more transparent, we will apply the design procedure presented here to the
layout of an integer-N frequency synthesizer in Chap. 6.
Some comments on resonant tank VCOs, VCXOs, and the like. As mentioned earlier,
relaxation VCOs cannot operate at frequencies above about 50 MHz. In applications involving
higher frequencies, the resonant type VCO must be used—therefore, refer to Fig. 2.26. In the
following, design equations are given that are required to specify the components of this type