Page 184 - Phase-Locked Loops Design, Simulation, and Applications

DESIGN PROCEDURE FOR MIXED-SIGNAL PLLS Ronald E. Best 113
the equations for ω and ζ in Tables 3.1 through 3.5 are used to calculate the two time
n
constants τ and τ from the known values of ω , ζ, K , K , and N. When the active lead-lag
1
d
n
2
0
filter is used, a suitable value for K must be chosen in addition. Only values of K > 1 are
a a
reasonable, of course. Typically, K is in the range 2 through 10. When a current output PFD
a
is used, however, time constant τ and the value of capacitor C (cf. Fig. 2.17b) must be
2 1
computed using the equations for ω and ζ in Table 3.5 from the known values of ω , ζ, K ,
n n 0
K , and N. The design proceeds with step 19.
P
Step 12. (Continued from step 4.) Because noise at the reference input can be discarded, the
best choice for the phase detector is the PFD. We have the choice between a voltage output
and a current output PFD. When the voltage output PFD is applied and runs from a unipolar
power supply with supply voltage U , its detector gain K is given by K = U /4π. When a
B d d B
bipolar power supply is used or when the logic levels differ substantially from the voltages of
the supply rails, use the general formula given in Sec. 2.4.4.1. In case of the current-output
PFD, the detector gain K must be specified. Refer to the data sheet of the corresponding
P
device.
Step 13. In this step, the characteristic of the VCO will be determined (refer also to Fig.
5.2). As mentioned earlier, the procedure is restricted to relaxation VCOs. When a resonant
VCO is used, however, the design can be adapted correspondingly (refer to the comments at
the end of this chapter). Because the center frequency ω (or the range of ω ) is known and
0
0
the range of the divider ratio N is also given, we can calculate the range of output (angular)
frequencies that must be generated by the VCO. Let ω 2min and ω 2max be the minimum and

maximum output frequencies of the VCO, respectively. A suitable VCO must be selected first.
In most cases, the VCO will be part of the PLL system, typically an integrated circuit. Given
the supply voltage(s) of the VCO, the data sheet indicates the usable range of control voltage
u . For a unipolar power supply with U = 5 V, this range is typically 1 to 4 V. Let u and
f B fmin
u fmax be the lower and upper limit of that range, respectively. The VCO is now designed such
that it generates the output frequency ω = ω 2min for u = u fmin and the output frequency ω =
f
2
2
ω for u = u . The corresponding VCO characteristic is plotted in Fig. 5.2. Now the
2max f fmax
VCO gain K is calculated from the slope of this curve—in other words
0

Now the external components of the VCO can be determined also. Usually, the data sheets
tell you how to calculate the values of these elements.
Step 14. Specify the type of loop filter. Because the PFD is used as a phase detector, the
passive lead-lag filter will be used in most cases. This combination of phase detector and loop
filter offers infinite pull-in range and hold range, as explained in Sec. 3.9.3. Other types of
loop filters do not bring significant benefits, hence the following procedure is based on the
passive lead-lag loop filter.