Page 2 - Phase-Locked Loops Design, Simulation, and Applications

Source : Phase-Locked Loops: Design, Simulation, and Applications, Sixth
Edition Ronald E. Best 1

Introduction to PLLs

Operating Principles of the PLL

The phase-locked loop (PLL) helps keep parts of our world orderly. If we turn on a
television set, a PLL keeps heads at the top of the screen and feet at the bottom. In color
television, another PLL makes sure green remains green and red remains red (even if
politicians claim the reverse is true).
A PLL is a circuit that causes a particular system to track with another one. More
precisely, a PLL is a circuit synchronizing an output signal (generated by an oscillator)
with a reference or input signal in frequency as well as in phase. In the synchronized—
often called “locked”—state, the phase error between the oscillator’s output signal
and the reference signal is zero, or it remains constant.
If a phase error builds up, a control mechanism acts on the oscillator in such a way that
the phase error is again reduced to a minimum. In such a control system, the phase of the
output signal is actually locked to the phase of the reference signal. This is why it is
referred to as a phase-locked loop.
The operating principle of the PLL is explained by the example of the linear PLL
(LPLL). As will be pointed out in Sec. 1.3, other types of PLLs exist—for example,
digital PLLs (DPLLs), all-digital PLLs (ADPLLs), and software PLLs (SPLLs). The PLL
block diagram is shown in Fig. 1.1a and consists of three basic functional blocks:

■ A voltage-controlled oscillator (VCO)
■ A phase detector (PD)
■ A loop filter (LF)

In this simple example, there is no down scaler between the output of VCO [u (t)] and
2
the lower input of the phase detector [ω ]. Systems using down scalers are discussed in
2
the following chapters.
In some PLL circuits, a current-controlled oscillator (CCO) is used instead of the VCO.
In this case, the output signal of the phase detector is a controlled

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