Page 68 - Troubleshooting Analog Circuits

Location, Location, and . . . Location 55

supply foil-guard it with a stripe of ground foil or “guard foil” between the two. A
dozen times I have heard an engineer say, “The resistivity of this glass-epoxy mate-
rial is lOI4 a-cm, so you can’t possibly expect to have a resistance of 10l2 R from
your summing point to the rest of the world . . . ” Then, I demonstrate that the mea-
sured impedance is typically a lot more than the specifications say, but I agree that I
wouldn’t dare count on that fact. So, I guard the summing point to ground with a
grounded foil surrounding the critical nodes on both the top and bottom of the boards.
With the addition of these grounds, the circuit can perform well even under worst-
case humidity conditions. After all, the internal volume of the glass-epoxy insulator
is always dry, whereas the surface is the place where you can easily get a leakage
problem due to dirt or moisture. That’s where you have to prevent the leakage. Of
course, crosstalk and high-frequency capacitive-coupling problems are caused by
adjacent foil locations and are cured by the same guarding and shielding just dis-
cussed to prevent foil leakages. To help you plan a good layout, think about what
dvldt and dildt will do in a poor layout.

Location, Location, and.. . Location

The field of PC-board layout is a subject unto itself. But there are some things you
can do or add to a layout that will make testing the circuit much easier. Thoughtful
designers have a store of these tricks, but I bet very few people write them down. In
my world, the unwritten rules are the ones that are broken, so we are trying to write
them down. I recommend that all designers write down a list of their good ideas.
Some layout tips from my list are:
Make sure that the signals you need access to, for troubleshooting or analysis, are
easy to find and probe. Make a small hole in the solder mask for accessibility.
Include a silk-screen layer of labels in your layout artwork showing each component
and its reference designation. It’s also a good idea to label numbered test nodes and
the correct polarity of diodes and electrolytic capacitors.
Arrange the signal paths so that if you are desperate, you can easily break a link and
open a loop, be it analog or digital.
Many modem PC boards have multiple layers and sophisticated patterns of ground
planes, power-supply busses, and signal flows. Troubleshooting such a board re-
quires specialized techniques and skills and all sorts of “maps,” so you don’t get lost
or confused. Make sure that all the board’s nodes are accessible, not hidden or buried
on an inside layer. or under a large component.
When possible, leave adequate space around components, especially ones that are
more likely to fail and need to be replaced. Such components might be part of circuits
that lead off the board and into the realm of ESD transients and lightning bolts. and
thus might occasionally fail.

Locate delicate components away from the edge of boards, where they might be
damaged by rough handling.
Beware of using eyelets to connect different layers of foil on your PC board.

Years ago, plated-through holes were considered risky, so we used eyelets to con-
nect the top and bottom foils. When these eyelets went through temperature cycling.
the thermal stresses would cause the eyelets to fift the foil right off the boards. Even
in the last year, I have seen advertisements that sing out the praises of eyelets on PC