Page 369 - ARM 64 Bit Assembly Language

Advanced SIMD instructions 359

Name Effect Description
(s|u|f)min n ← # of elements Compare corresponding elements
for 0 ≤ i< n do and copy the lesser of each pair
if Vn[i] < Vm[i] then into the corresponding element in
Vd[i]← Vn[i] the destination vector.
else
Vd[i]← Vm[i]
end if
end for

(s|u|f)minp n ← # of elements Compare elements pairwise and
for 0 ≤ i< (n ÷ 2) do copy the lesser of each pair into
if Vm[i] < Vm[i + 1] then an element in the destination
Vd[i]← Vm[i] vector.
else
Vd[i]← Vm[i + 1]
end if
end for
for (n ÷ 2) ≤ i< n do
if Vn[i] < Vn[i + 1] then
Vd[i + (n ÷ 2)]← Vn[i]
else
Vd[i + (n ÷ 2)]←
Vn[i + 1]
end if
end for

10.6.7.3 Examples

1 umin v1.16b,v2.16b,v3.16b // Get minimum values
2 fmaxp v0.4s,v0.4s,v5.4s // Get maximum values pairwise

10.6.8 Count bits

These instructions can be used to count leading sign bits or zeros, or to count the number of
bits that are set, for each element in a vector:

cls Vector count leading sign bits,
clz Vector count leading zero bits, and
cnt Vector count set bits.