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94 CHAPTER THREE
very little battery power when they are off and can retain critical data for long time
periods.
Dynamic Memory
Most computer boards these days use flash memory for the nonvolatile boot program
and dynamic memory for the bulk of the volatile memory space. It’s not uncommon for
the entire computer program to be stored in flash memory, transferred to dynamic mem-
ory, and executed from there. The reason is execution speeds out of dynamic memory
are often faster. To understand why, we have to go into the physics this time.
DRAM behaves the way it does for one primary reason: It only uses one transistor
to store a bit. It does this by taking advantage of some of the capacitance under the
transistor. A capacitor is basically a place to store electrons. The number of electrons
in the capacitor determines whether a binary one or zero exists in the bit. A data bit,
in the form of voltage, can be moved to the transistor. Then the transistor can put the
data into the capacitor just by turning on. If the data, represented by voltage, is a one,
then electrons flood into the capacitor. If the data is a zero, the capacitor is drained of
electrons. When the time comes to read the data bit, the transistor turns on and the
number of electrons in the capacitor is inspected. If enough of them are present, the
computer reads a one.
DRAM is very dense because it only needs one transistor per bit, thus saving space
on the integrated circuit itself. However, some problems occur with this memory struc-
ture. For starters, the very act of reading the bit destroys it. This is called destructive
readout. Immediately after reading the bit, the memory support circuitry within the
computer must rewrite the data bit back into the capacitor.
Another problem happens as well. Once a bit is written into the capacitor beneath the
transistor, it begins to deteriorate. The electrons in the capacitor begin to leak away one
at a time. It only takes a few milliseconds before the integrity of the data bit can be
called into question. Accordingly, many of the memory chips have circuitry within them
to automatically read every bit and rewrite it every few milliseconds. This process is
called refresh. Some computers perform this operation using refresh circuitry within
the computer chip itself. Be very careful to think through the refresh scheme when
choosing memory for the robot. At least one of the chips must handle the refresh task.
One of the other disadvantages of DRAM is the complex timing required for the sig-
nals. We’ll get into how DRAM works in a minute, but the complex timing of the sig-
nals brings up two problems. First of all, almost no way is available for putting the
computer to sleep to conserve power. With all the signals running all the time, the
DRAM generally cannot go to a low-power mode. If a low-power sleep mode is impor-
tant for the robot design, consider SRAMS instead. Second, if we’re building our own