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98 CHAPTER THREE
cache memory. Consider a program that skips around all over the place in memory. The
cache controller cannot be effective if it cannot store all the instructions in the cache at
the same time. It is continually asked to put new locations into the cache and is inef-
fective. The programmer is said to be “thrashing cache.” Say that five times fast!
Be careful in the design of the robot’s software that the program execution does not
jump around too much. In larger, more complex computer chips (such as StrongARM),
it is possible to confine the use of cache memory to specific memory ranges and thus
avoid areas of the computer program that will dump the cache without positive benefit.
By the way, cache memory can also hold and mimic the contents of flash memory
too. This is useful if the processor executes out of flash.

Cache Interaction with DRAM
We mentioned before that DRAM can be used in paging mode. When a processor with
a modern cache controller (like the Xscale StrongARM) reads a DRAM address, it does
not simply read just one instruction. Since the DRAM retrieves 1,024 (or so) bits at a
time during the RAS cycle, the processor can execute, for example, 16 CAS cycles to
fill up the cache with the subsequent words from memory. This is a very time-efficient
way to fill the cache memory. The processor is up to other things with the fetched
instruction while the cache controller is busy dragging words out of memory with page-
mode CAS cycles. The only drawback of such activity is that it makes it difficult to
monitor the actions of the processor externally by just observing the activity on the
memory address lines.

COMPUTATION AND STORAGE REGISTERS
Every computer chip is capable of performing arithmetic and logical functions. They
contain computational circuitry that can add and subtract word-length words at instruc-
tion speeds. Certainly, it’s important to analyze the requirements for the robot and the
arithmetic computations that will be necessary. We can talk about that in another sec-
tion of the book, but it’s important to note one or two things here.
First, computers contain spare, word-length registers that are used to store interme-
diate results when they are not in use. If a computation handles many different numbers
at the same time, a computer with many spare registers (termed general-purpose [GP]
registers) can often execute the computations at a faster rate. To take advantage of this
capability, we often have to take a very close look at the software and the compiler (if
one exists). Often, a compiler will automatically avoid using GP registers, preferring to
use slower memory locations instead. This is done so the compiler will be usable on