Page 194 - Bebop to The Boolean Boogie An Unconventional Guide to Electronics Fundamentals, Components, and Processes
P. 194

MemoryICs      175

              EEPROMs
                 A further technology called             -bits wide (although dual configurations
              electrically -erasable read-only memory   have been used to provide 128 bit wide
              (EEPROM or E2PROM) l9 was               busses in really high-end computers).
              developed towards the end of the            Thus,  assuming a standard 64-bit
                                                              wide PClOO (100 MHz) memory
              1970s. E2PROMs are electrically
                                                             , the peak data throughput will be
             programmable by the designer and           x 100 = 800 megabytes per second. If a
              are nonvolatile, but can be electri-      DR version becomes available as discussed
              cally erased and reprogrammed             rlier,  this would rise to 1,600  megabytes
              should the designer so desire.          per second. Furthermore,  a 128-bit wide
              Additionally, by means of addi-         DDR (using dual 64-bit modules in parallel)
                                                        ould have a peak bandwidth of 3,200
              tional circuitry, an E2PROM can         megabytes per second.
              be erased and reprogrammed while            Towards the end of the 199Os,  an
              remaining resident on the circuit           rnative memory concept called Rambus
              board, in which case it may be              an to gain attention (as usual this is
              referred to as in-system progrummable   based on core DRAM concepts presented
              (ISP).                                     a cunning manner).  By around 2000,
                                                         rsonal computers equipped  with memory
                 An EPROM cell is based on a          modules formed from Rambus DRAM
              single transistor and is therefore      (RDRAM)  devices were available. These
              very efficient in terms of silicon      memory modules were 16-bits (2-bytes)
              real estate, while an equivalent          ide, and were accessed  on both edges of
              E2PROM cell is based on two             a 400 MHz clock, thereby providing a peak
                                                        ata throughput of 2 x 2 x 400 = 1,600
              transistors and requires more area      megabytes per second. (Just to be confus-
              on the silicon. However, an             ing, these devices are actually referenced as
              EPROM device must be erased and            00 MHz Rambus DRAM,“ but this is just
              reprogrammed in its entirety, while       arketing spin trying to make using both
              an E2PROM device can be erased               s of a 400 MHz clock sound more
              and reprogrammed on a word-by-
              word basis.
                                                      bus using both edges of a 533 MHz clock
                                                      (the official announcements quote ”1,066
                                                      MHz Rambus DRAM,” but this is the same
              19 In conversation, some people pronounce   marketing spin as noted above).  Whatever,
                EEPROM as ”E-E-PROM” (spelling out    this will provide a peak bandwidth of 4,200
                “E-E followed with “prom”), while     megabytes per second.
                others say “E-squared-prom.”
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