Page 50 - Building A Succesful Board-Test Strategy

36 BUILDING A SUCCESSFUL BOARD-TEST STRATEGY

question. Foregoing test at the board level means assuming that the boards are
good or at least that very few will fail at system test. Another alternative is to test
boards and backplanes, but not full systems. That approach assumes that if the
boards are good and the backplane is good, the system will work. Most compa-
nies today prefer at least some assurance that the system functions as an entity.
System test therefore remains part of most strategies.
Is there a burn-in or other ESS step? If so, does test occur before, during, or
after it?
Perhaps the most important question—Is test necessary?—is being asked
more today than ever before. Some years ago, a Japanese television manufacturer
decided to perform no testing until final product turn-on just before shipment. By
carefully controlling vendor product quality and the manufacturing process, the
company achieved a 96 percent turn-on rate. With that type of quality directly from
the process, the most cost-effective strategy would probably be to test only those
products that fail.
An American company trying to implement the same strategy fared less well.
They managed a turn-on rate of only 36 percent. Further efforts on process and
vendor control got yields up to about 74 percent, but either result would mandate
continuing to test every board.
A few years later, a Japanese printer manufacturer decided to concentrate on
process and vendor control, shipping products without testing them at all—not
even the turn-on test. The number of DOAs ("dead on arrivals") that resulted
forced the company to reinstitute a more traditional strategy.
How will a test gain access to the board's components? Does it employ a bed-
of-nails? Is access available only through an edge connector, or have the designers
provided a test connector as well? Are the components and boards set up to take
advantage of boundary-scan techniques, allowing access to internal nodes from the
board edge?
Some in-circuit-type testers aimed at low-volume applications use clips and
probes for access to standard digital parts. An operator clips an appropriate con-
nector to one of the devices, then executes a test for that device, moves the clip or
chooses a different clip for the next device, and executes the next test.
Because clips are much less expensive than conventional bed-of-nails fixtures,
this approach can be cost-effective. It is also relatively common for diagnosing field
failures. For this technique to work reliably, the board's population density must
be fairly low, and the devices have to be leaded to permit clips to make sufficient
contact.
Does the product include a self-test? Many electronic products today auto-
matically test critical core functions on power-up. Incorporating this self-test to
supplant physical node access and reduce test-generation efforts can significantly
simplify any test strategy.
Self-tests often cover more than a third of possible failure mechanisms. Some
companies have achieved more than 80 percent fault coverage during self-test.
Unfortunately, test strategies often fail to take advantage of the self-test other
than to verify that it is present and that it works. Exercising the self-test during