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24  CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE

           Table 2.1 The IAS Instruction Set

             Instruction             Symbolic
               Type      Opcode   Representation                 Description
                         00001010  LOAD MQ       Transfer contents of register MQ to the accumulator AC
                         00001001  LOAD MQ,M(X)  Transfer contents of memory location X to MQ
                         00100001  STOR M(X)     Transfer contents of accumulator to memory location X
            Data transfer  00000001  LOAD M(X)   Transfer M(X) to the accumulator
                         00000010  LOAD M(X)-    Transfer  M(X) to the accumulator-
                         00000011  LOAD |M(X)|   Transfer absolute value of M(X) to the accumulator
                         00000100  LOAD |M(X)|-  Transfer  |M(X)| to the accumulator-
            Unconditional  00001101  JUMP M(X,0:19)  Take next instruction from left half of M(X)
            branch       00001110  JUMP M(X,20:39)  Take next instruction from right half of M(X)
                         00001111  JUMP+  M(X,0:19)  If number in the accumulator is nonnegative, take next in-
            Conditional                          struction from left half of M(X)
            branch       00010000  JUMP+  M(X,20:39)  If number in the accumulator is nonnegative, take next
                                                 instruction from right half of M(X)
                         00000101  ADD M(X)      Add M(X) to AC; put the result in AC
                         00000111  ADD |M(X)|    Add |M(X)| to AC; put the result in AC
                         00000110  SUB M(X)      Subtract M(X) from AC; put the result in AC
                         00001000  SUB |M(X)|    Subtract |M(X)| from AC; put the remainder in AC
            Arithmetic   00001011  MUL M(X)      Multiply M(X) by MQ; put most significant bits of result
                                                 in AC, put least significant bits in MQ
                         00001100  DIV M(X)      Divide AC by M(X); put the quotient in MQ and the
                                                 remainder in AC
                         00010100  LSH           Multiply accumulator by 2; i.e., shift left one bit position
                         00010101  RSH           Divide accumulator by 2; i.e., shift right one position
                         00010010  STOR M(X,8:19)  Replace left address field at M(X) by 12 rightmost bits
            Address                              of AC
            modify       00010011  STOR M(X,28:39)  Replace right address field at M(X) by 12 rightmost
                                                 bits of AC




                       Table 2.1 presents instructions in a symbolic, easy-to-read form.Actually, each
                  instruction must conform to the format of Figure 2.2b. The opcode portion (first
                  8 bits) specifies which of the 21 instructions is to be executed. The address portion
                  (remaining 12 bits) specifies which of the 1000 memory locations is to be involved in
                  the execution of the instruction.
                       Figure 2.4 shows several examples of instruction execution by the control unit.
                  Note that each operation requires several steps. Some of these are quite elaborate.
                  The multiplication operation requires 39 suboperations, one for each bit position ex-
                  cept that of the sign bit.

                  COMMERCIAL COMPUTERS The 1950s saw the birth of the computer industry with
                  two companies, Sperry and IBM, dominating the marketplace.
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