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6.2 DSP Systems                                                       227












                           Figure 6.2 The three parts of an algorithm




             Generally, a DSP algorithm can be described by a set of expressions, as shown
        shortly. The sign ":=" is used to indicate that the expressions are given in
        computational order.










            Note that the arguments on the right-hand side of the two first expressions
        contain only old (i.e., known) values. These two expressions can therefore be com-
        puted immediately. Once these have been evaluated, the remaining expressions
        can be computed successively.
            DSP algorithms can be divided into iterative processing and block processing
        algorithms. An iterative algorithm performs computations on a semi-infinite
        stream of input data, i.e., input data arrive sequentially and the algorithm is exe-
        cuted once for every input sample and produces a corresponding output sample.
        The period between two consecutive iterations is called the iteration period or sam-
        ple interval. In block processing, a block of output samples is computed for each
        input block, which results in a large delay between input and output. Block process-
        ing is commonly used for DSP algorithms based on matrix operations, but it can
        also be used to increase the maximum sample rate. Block processing algorithms
        can be used if the input samples arrive in batches (blocks) or in non-realtime appli-
        cations. Here we will mainly discuss the former type of algorithm which is charac-
        terized by the following properties:
            Q The input and output data rates are high.
            Q The input and output values are synchronized with the sample period.
            Q The sequence of operations is data independent.
            Q The algorithm must be executed periodically.
            Q Hard real-time operation with a deadline equal to the sampling period.
            On the surface, most DSP algorithms look very simple since they consist of a
        set of basic arithmetic expressions evaluated repeatedly. Complicated data struc-
        tures are seldom used. These facts are often misunderstood by novice hardware
        designers who may be tempted to modify an algorithm to suit the idiosyncrasies of
        the hardware, design techniques, or tools. Such uninitiated and sometimes undoc-
        umented changes of the algorithm must be avoided, since underlying the DSP
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