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Interrupts in Embedded Systems                                       5
















                 I have deliberately left discussion of interrupts out of the preceding chapters, treat-
                 ing interrupt code as a “black box” that produces certain outputs. Part of the reason
                 for the brevity of Chapter 4 is that the real-time aspect of an embedded system often
                 depends on  interrupts; such  software is  covered here.  Interrupts  in  a real-time
                 system require a tight relationship between software and hardware.






                 Interrupt Basics


                 An interrupt is an input to a microprocessor that temporarily redirects the program
                 flow. An  interrupt  can  now the  processor when  an  analog-todigital  converter
                 (ADC) has new data, when a timer rolls over, when a direct memory access (DMA)
                 transfer  is  complete, when  another  processor wants  to  communicate, or  when
                 almost any asynchronous event happens. The interrupt hardware is initialized and
                 programmed  by  the  system  software. When  an interrupt  is  acknowledged, that
                 process is  performed  by  hardware  internal  to  the  processor  and  the  interrupt
                 controller integrated circuit (IC) (if any). Figure 5.1 shows the sequence of events
                 performed by  the  hardware and software in  response  to an interrupt. When  an
                 interrupt occurs, the on-chip hardware performs the following functions:

                   It saves the program counter (the address the processor was executing when the
                  interrupt occurred) on the stack. Some processors save other information as well,
                  such as register contents.
                   It executes an interrupt acknowledge cycle to get a vector from the interrupting
                  peripheral, depending on the processor and the specific type of interrupt.
                  It branches to a predetermined address specific to that particular interrupt.
                   The destination address is the interrupt service routine (ISR, or sometimes ISP for
                 interrupt service process). The ISR performs whatever functions are required and


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