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firmware writes anything to the ROM space. This technique is useful when all the
                   available 1/0 decodes are used up and trace capability needs to be added after the
                   hardware is finalized. The one drawback to this method occurs in systems that have
                   flash or other writable memory, where  a  careless write sequence actually could
                   change the data.
                     Like the write to an 1/0 port, this method can use different addresses for dif-
                   ferent data types. Note that if the Motorola-type bus is used, a DTACKmust be gen-
                   erated for the debug write cycle.




                   Read from ROM


                   Some microcontrollers, such as the 8051, lack the capability of writing to the ROM
                   space. However, they do have instructions that can read from ROM  to do things
                   like table lookups. Figure 6.3 shows a circuit that can be used to generate trace data
                   by  this method. A low-going strobe is generated when a read is performed  from
                   any PROM address above 8000 h. When using this circuit, the trace data is captured
                   from the low-order  address lines, A0  through A7, and the data lines are ignored.
                   The circuit shown in  Figure 6.3 assumes that  the  ROM  is  located  in  the  lower
                   32K. If  the ROM is larger  than 32K, a wider NAND gate can be used to further
                   decode the address bits, generating a strobe only for the upper  1K or less. The
                   following  code  shows  how  this  would  be  implemented  on  an  8051  family
                   microcontroller:

                     MOV  DPTR,#8000 h  ; starting address-upper  32 k
                     MOV  A,#CONSTANT  ; constant is the trace value
                     MOV A,@A+DFTR ; output the value.

                     This method can use different addresses to iden@  different types of trace data,
                   but both addresses must be in the upper 8 bits of the address field, since the lower

                                 ROM Cs
                                                                 OUTPUT S  m
                                    OT
                                   A15  I



                                    -
                                  ) AOA7  *                       TRACEDATA

                   Figure 6.3
                   Generating Trace Data by Read from  ROM.

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