Page 334 - Embedded Microprocessor Systems Real World Design

Appendix C

Digital Logic Re view

This appendix reviews digital logic concepts. The review will not be comprehensive but will
address those portions of the topic that are needed in the book. The concepts presented
here refer to basic digital logic gates and functions, even though those functions usually are
implemented in some type of programmable or configurable logic in modern designs.
The basic concept behind digital logic is ones and zeros. A digital logic signal is either
one or zero, high or low, on or off. The high/low, on/off state may be defined in different
ways. For TTL logic, high is anything over about 2.4V, while a low is anything below 0.8V.
In between is an undefined region where the signal should never be.
For CMOS logic operating at SV, the high/low cutoff is about 2.5V-anything higher is
considered “high”; anything lower is considered “low.” An -232 signal, like the ones that
come from the COM ports on a PC, swing both positive and negative. The high state is
anything above +3V and the low state is anything below -3V. A current-loop interface, like
the MIDI signals that connect music synthesizers, defines hzgh as the absence of current flow
in a pair of wires, and low as the presence of current flow.
Differential logic is unique in that the high/low state can be defined with only two signals.
If one is at a higher voltage than the other, the resulting state is “high.” If the two are
reversed, the result is “low.” If both are the same, the signal state is undefined.
Sometimes digital signals are described as true or active and false or inactive. In this case,
the true/active and false/inactive states may be defined as either high or low. When work-
ing with microprocessors, it is quite common to find signals that are true or active in the
low state.
A signal that is high usually is capable of driving (sourcing) some current into whatever
is connected to it. A signal that is low usually is drawing, or sinking, current from the
Lonnected device. Typical digital logic circuits cannot sink current when in the high state
or source current in the low state. In some cases, such as CMOS logic, the impedance of the
receivers is very high and the amount of current is insignificant except when the signal is
changing states. However, the sourcing-while-high and sinking-while-low restriction still
applies to the driving device, even if the receiving devices are neither using nor providing
current. If two outputs are connected together and one is low while the other is high, the
output is indeterminate. In real logic, the low output usually wins, but the voltage is not
guaranteed to be a valid logic state. Whichever output wins, both will have considerable
current flowing through them, and one or both often is damaged if the condition persists.

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