Page 11 - Engineering Digital Design

CONTENTS

3. Background for Digital Design 79
3.1 Introduction 79
3.2 Binary State Terminology and Mixed Logic Notation 79
3.2.1 Binary State Terminology 79
3.3 Introduction to CMOS Terminology and Symbology 82
3.4 Logic Level Conversion: The Inverter 83
3.5 Transmission Gates and Tri-State Drivers 84
3.6 AND and OR Operators and Their Mixed-Logic Circuit Symbology 87
3.6.1 Logic Circuit Symbology for AND and OR 87
3.6.2 NAND Gate Realization of Logic AND and OR 88
3.6.3 NOR Gate Realization of Logic AND and OR 89
3.6.4 NAND and NOR Gate Realization of Logic Level Conversion 90
3.6.5 The AND and OR Gates and Their Realization of Logic
AND and OR 92
3.6.6 Summary of Logic Circuit Symbols for the AND and OR Functions
and Logic Level Conversion 94
3.7 Logic Level Incompatibility: Complementation 95
3.8 Reading and Construction of Mixed-Logic Circuits 97
3.9 XOR and EQV Operators and Their Mixed-Logic Circuit Symbology 98
3.9.1 The XOR and EQV Functions of the XOR Gate 100
3.9.2 The XOR and EQV Functions of the EQV Gate 100
3.9.3 Multiple Gate Realizations of the XOR and EQV Functions 101
3.9.4 The Effect of Active Low Inputs to the XOR and EQV Circuit Symbols 102
3.9.5 Summary of Conjugate Logic Circuit Symbols for XOR and EQV Gates 103
3.9.6 Controlled Logic Level Conversion 103
3.9.7 Construction and Waveform Analysis of Logic Circuits Containing
XOR-Type Functions 104
3.10 Laws of B oolean Algebra 105
3.10.1 NOT, AND, and OR Laws 106
3.10.2 The Concept of Duality 107
3.10.3 Associative, Commutative, Distributive, Absorptive, and
Consensus Laws 108
3.10.4 DeMorgan's Laws 110
3.11 Laws of XOR Algebra 111
3.11.1 Two Useful Corollaries 114
3.11.2 Summary of Useful Identities 115
3.12 Worked Examples 116
Further Reading 120
Problems 121
4. Logic Function Representation and Minimization 131
4.1 Introduction 131
4.2 SOP and POS Forms 131
4.2.1 The SOP Representation 131
4.2.2 The POS Representation 134
4.3 Introduction to Logic Function Graphics 137
4.3.1 First-Order K-maps 138
4.3.2 Second-Order K-maps 138
4.3.3 Third-Order K-maps 140
4.3.4 Fourth-Order K-maps 143