Page 57 - Engineering Digital Design

28 CHAPTER 1 / INTRODUCTORY REMARKS AND GLOSSARY

T flip-flop: a flip-flop that operates in either the toggle or hold mode.
TG: transmission gate.
Throughput: the time required to produce an output response due to an input change.
Time constant: the product of resistance and capacitance given in units of seconds (s) — a
measure of the recovery time of an R-C circuit.
Timing diagram: a set of logic waveforms showing the time relationships between two
or more logic signals.
Toggle: repeated but controlled transitions between any two states, as between the Set
and Reset states.
Toggle module: a flip-flop that is configured to toggle only. Also, a divide-by-2 counter.
Transfer characteristic: for a transistor switch, a plot of current (7) vs voltage (V).
Trans-HI module: a transparent high (RET) D latch.
Trans-LO module: a transparent low (FET) D latch.
Transistor: a three-terminal switching device that exhibits current or voltage gain.
Transistor-transistor logic: a logic family in which bipolar junction transistors provide
both logic decision and current gain.
Transition: in a digital machine, a change from one state (or level) to another.
Transmission gate: a pass transistor switch.
Transparent D latch: a two-state D flip-flop in which the output, Q, tracks the input, D,
when clock is active if RET or when clock is inactive if FET.
Tree: combining of like gates, usually to overcome fan-in limitations.
Triggering threshold: the point beyond which a transition takes place.
Triggering variable: sampling (enabling) variable.
Tri-state bus: as used in this text, the wire-ORed output lines from a multiplexed scheme
of PLDs having tri-state enables. Note: tri-state is a registered trademark of NSC.
Tri-state driver: an active logic device that operates in either a disconnect mode or an
inverting (or noninverting) mode. Also, three-state driver. Note: tri-state is a registered
trademark of NSC.
True hold: the condition whereby a device can sustain the same logic output values over
any number of clock cycles independent of its input logic status.
Truth table: a table that provides an output value for each possible input condition to a
combinational logic device.
TTL: transistor-transistor (BJT) logic.
Twisted ring counter: a configuration of shift registers that generates a creeping code
output.
Two-level logic: logic consisting of only one ANDing and one ORing stage.
Two-phase clocking: two synchronized clock signals that have nonoverlapping active or
nonoverlapping inactive waveforms.
Two's complement: one's complement plus one added to the LSB.
Unconditional branching: state-to-state transitions that take place independent of the
input status of the FSM.
Unconditional output: an output of an FSM that does not depend on an input signal.
Union: OR operation.
Unit distance code: a code in which each state in the code is surrounded by logically
adjacent states.
Universal flip-flop: a JK flip-flop.
Universal gate: a NAND or NOR gate.