Page 53 - Engineering Digital Design

24 CHAPTER 1 / INTRODUCTORY REMARKS AND GLOSSARY

Preset: an asynchronous input that is used in flip-flops to set them to a logic 1 condition.
Prime implicant (PI): a group of adjacent minterms or maxterms that are sufficiently
large that they cannot be combined with other groups in any way to produce terms of
fewer variables.
Primitive: a discrete logic device such as a gate, MUX, or decoder.
Priority encoder: a logic device that generates a coded output based on a set of prioritized
data inputs.
Product-of-sums (POS): the ANDing of ORed terms in a Boolean expression.
Programmable logic array (PLA): any PLD that can be programmed in both the AND
and OR planes.
Programmable logic device (PLD): any two-level, combinational array logic device
from the families of ROMs, PLAs, PALs or FPGAs, etc.
Programmable read-only memory (PROM): a once-only user-programmable ROM.
PROM: programmable read-only memory.
Propagation delay: in a logic device, the time interval of an output response to an input
signal.
PS: present state.
PS/NS: present state/next state.
P-term: a Boolean product term-one consisting only of ANDed literals.
P-term table: a table that consists of p-terms, inputs, and outputs and that is used to
program PLA-type devices.
Pull-down resistor: a resistor that causes a signal on a line to remain at low voltage.
Pull-up resistor: a resistor that causes a signal on a line to remain at high voltage.
Pulse: an abrupt change from one level to another followed by an opposite abrupt change.
Pulse mode: an operational condition for an asynchronous FSM where the inputs are
required to be nonoverlapping pulse signals.
Pulse width: the active duration of a positive pulse or the inactive duration of a negative
pulse.
Quad: a grouping of four logically adjacent minterms or maxterms.
Quadratic convergence: a process as in "fast division" whereby the error per iteration
decreases according to the inverse square law.
Quotient: the result of a division operation.
R: reset.
Race condition: a condition in a sequential circuit where the transition from one state to
another involves two or more alternative paths.
Race gate: the gate to which two or more input signals are in race contention.
Race path: any path that can be taken in a race condition.
Race state: any state through which an FSM may transit during a race condition.
Radix: the number of unique symbols in a number system — same as the base of a number
system.
RAM: random access memory.
Random access memory (RAM): a read/write memory system in which all memory
locations can be accessed directly independent of other memory locations.
R-C: resistance/capacitance or resistor/capacitor.
Read only memory (ROM): a PLD that can be mask programmed only in the OR
plane.