Page 50 - Engineering Digital Design

1.4 GLOSSARY OF TERMS, EXPRESSIONS, AND ABBREVIATIONS 21

Natural binary coded decimal: a 4-bit, 10-word code that is weighted 8,4, 2,1 and that
is used to represent decimal numbers. Same as binary code.
NBCD: natural binary coded decimal. Same as binary coded decimal (BCD).
n-channel: an n-type conducting region in a p-type substrate.
Negative logic: a logic system in which high voltage (HV) corresponds to logic 0 and
low voltage (LV) corresponds to logic 1. The opposite of positive logic.
Negative pulse: a 1-0-1 pulse.
Nested cell: a basic cell that is used as the memory in an asynchronous FSM design.
Nested machine: any asynchronous machine that serves as the memory in the design of
a larger sequential machine. Any FSM that is embedded within another.
Next state (NS): a state that follows the present state in a sequence of states.
Next state forming logic: the logic hardware in a sequential machine whose purpose it
is to generate the next state function input to the memory.
Next state function: the logic function that defines the next state of an FSM given the
present state.
Next state map: a composite K-map where the entries for each cell are the next state
functions for the present state represented by the coordinates of that cell (see flow
table).
Next state variable: the variable representing the next state function.
Nibble: a group of four bits.
NMH: noise margin high — the lower voltage limit of logic 1 and the upper boundary of
the uncertainty region.
NML: noise margin low — the upper voltage limit of logic 0 and the lower boundary of
the uncertainty region.
NMOS: an n-channel MOSFET.
Noise immunity: the ability of a logic circuit to reject unwanted signals.
Noise margin: the maximum voltage fluctuation that can be tolerated in a digital signal
without crossing the switching threshold of the switching device.
Non-restoring logic: logic that consists of passive switching devices such as diodes or
transmission gates that cannot amplify but that dissipate power.
Nonvolatile: refers to memory devices that require no power supply to retain information
in memory.
NOR-centered basic cell: cross-coupled NOR gates forming a basic cell.
NOR gate: a physical device that performs the electrical equivalent of the NOT OR
function.
NOR/INV logic: combinational logic consisting exclusively of NOR gates and inverters.
NOT function: an operation that is the logic equivalent of complementation.
NOT laws: a set of Boolean identities based on the NOT function.
npn: refers to a BIT having a p-type semiconductor base and an n-type semiconductor
collector and emitter.
NS: next state.
Octad: a grouping of eight logically adjacent minterms or maxterms.
Octal: a base 8 number system in which numbers 1 through 7 are used to represent 3-bit
binary numbers 000 through 111. (See Binary coded octal.)
Odd parity: an odd number of 1's or O's depending on how odd parity is defined.
Offset pattern: an XOR pattern in a K-map in which identical subfunctions are located
in two nondiagonal cells that differ in cell coordinates by two bits.