Page 47 - Engineering Digital Design

18 CHAPTER 1 / INTRODUCTORY REMARKS AND GLOSSARY

Line driver: a device whose purpose it is to boost and sharpen a signal so as to avoid
fan-out problems.
LFSR: linear feedback shift register.
LFSR counter: a counter, consisting of an LFSR, that can sequence through a unique set
of pseudorandom states controlled by external inputs.
Logic: the computational capability of a digital device that is interpreted as either a logic
1 or logic 0.
Logic adjacency: two logic states whose state variables differ from each other by only
one bit.
Logic cell: a configurable logic block (CLB).
Logic circuit: a digital circuit that performs the electrical equivalent of some logic func-
tion or process.
Logic diagram: a digital circuit schematic consisting of an interconnection of logic sym-
bols.
Logic family: a particular technology such as TTL or CMOS that is used in the production
oflCs.
Logic instability: the inability of a logic circuit to maintain a stable logic condition. Also,
an oscillatory condition in an asynchronous FSM.
Logic level: logic status indicating either positive logic or negative logic.
Logic level conversion: the act of converting from positive logic to negative logic or
vice versa.
Logic map: any of a variety of graphical representations of a logic function.
Logic noise: undesirable signal fluctuations produced within a logic circuit following
input changes.
Logic state: a unique set of binary values that characterize the logic status of a machine
at some point in time.
Logic waveform: a rectangular waveform between active and inactive states.
Look-ahead-carry (LAC): the feature of a "fast" adder that anticipates the need for a
carry and then generates and propagates it more directly than does a parallel adder (see
also carry look-ahead).
Loop-out: the action that identifies a prime implicant in a K-map.
Loop-out protocol: a minimization procedure whereby the largest 2 group of logically
adjacent minterms or maxterms are looped out in the order of increasing n (n = 0, 1,2,
3,...).
LPD: lumped path delay.
LPDD: lumped path delay diagram.
LSB: least significant bit.
LSD: least significant digit.
LSI: large-scale integration.
Lumped path delay diagram (LPDD): a diagram that replaces discrete gates with other
logic symbols for the purpose of comparing path delays from input to output.
Lumped path delay (LPD) model: a model, applicable to FSMs that operate in the
fundamental mode, that is characterized by a lumped memory element for each state
variable/feedback path.
LV: low voltage.
Magnitude comparator: comparator.