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1.4 GLOSSARY OF TERMS, EXPRESSIONS, AND ABBREVIATIONS                23


                  Parity generator: a combinational logic device that will append a logic 1 (or logic 0) to
                    a binary word so as to generate an even (or odd) number of 1 's (or O's).
                  Passive device: any device that is incapable of producing voltage or current gain and,
                    thus, only dissipates power.
                  Pass transistor switch: a MOS transistor switch that functions as a nonrestoring switch-
                    ing device and that does not invert a voltage signal. A transmission gate.
                  PCB: printed circuit board.
                  p-channel: a p-type conducting region in an n-type substrate.
                 PDF:   portable document format.
                  PDP: power-delay product.
                 PE: priority encoder.
                  Period: the time in seconds (s) between repeating portions of a waveform; hence, the
                    inverse of the frequency.
                 Physical truth table: an I/O specification table based on a physically measurable quantity
                    such as voltage.
                 PI: prime implicant.
                 Pipeline: a processing scheme where each task is allocated to specific hardware (joined
                    in a line) and to a specific time slot.
                 PIPO: parallel-in/parallel-out operation mode of a register.
                 PISO: parallel-in/serial-out operation mode of a register.
                 PL A: programmable logic array.
                 Planar format: a two-dimensional K-map array used to minimize functions of more than
                    four variables.
                 PLD: programmable logic device.
                 PLS: programmable logic sequencer.
                 PMOS: a p-channel MOSFET.
                 p-n junction diode: (see Diode)
                 pnp: refers to a BJT having an n-type semiconductor base and a p-type semiconductor
                    emitter and collector.
                 Polarized mnemonic: a contracted signal name onto which is attached an activation level
                    indicator.
                 Port: an entry or exit element to an entity (e.g., the name given to an input signal in a
                    VHDL declaration).
                 POS:   product-of-sums.
                 POS hazard: a static 0-hazard.
                 Positional weighting: a system in which the weight of a bit in a binary word is determined
                    by its polynomial representation.
                 Positive logic: the logic system in which HV corresponds to logic 1 and LV corresponds
                    to logic 0.
                 Positive pulse: a 0-1-0 pulse.
                 Power, P: the product of voltage, V, and current, /, given in units of watts (W).
                 Power-delay product (PDP): the average power dissipated by a logic device multiplied
                    by its propagation delay time.
                 PR or PRE: preset.
                 Present state (PS):  the logic state of an FSM at a given instant.
                 Present state/next state (PS/NS) table: a table that is produced from the next state
                    K-maps and that is used to construct a fully documented state diagram in an FSM analysis.
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