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1.4 GLOSSARY OF TERMS, EXPRESSIONS, AND ABBREVIATIONS                 13


                 EAIC system: externally asynchronous/internally clocked system.
                 ECL: emitter-coupled logic.
                 Edge-triggered flip-flop: a flip-flop that is triggered on either the rising edge or falling
                    edge of the clock waveform and that exhibits the data-lock-out feature.
                 EEPROM: electrically erasable PROM.
                 E-hazard: essential hazard.
                 El: enable-in.
                 Electron: the majority carrier in an n-type conducting semiconductor.
                 Electronic switch: a voltage or current controlled switching device.
                 Emitter: one of three terminals of a BIT.
                 Emitter-coupled logic (ECL): a high-speed nonsaturating logic family.
                 EN: enable.
                 Enable: an input that is used to enable (or disable) a logic device, or that permits the
                    device to operate normally.
                 Encoder: a digital device that converts digital signals into coded form.
                 Endless cycle: an oscillation that occurs in asynchronous FSMs.
                 Enhancement mode: a normally OFF NMOS that develops an n-channel drain-to-source
                    conducting path (i.e., turns ON) with application of a sufficiently large positive gate
                    voltage.
                 Entered variable (EV): a variable entered in a K-map.
                 EO: enable-out.
                 EPI: essential prime implicant.
                 EPLD: erasable PLD.
                 EPROM: erasable programmable read-only memory.
                 EQPOS: EQV-product-of-sums.
                 Equivalence: the output of a two-input logic gate that is active if, and only if, its inputs
                    are logically equivalent (i.e., both active or both inactive).
                 EQV:   equivalence.
                 EQV function: the function that derives from the definition of equivalence.
                 EQV gate: a physical device that performs the electrical equivalent of the EQV function.
                 EQV laws: a set of Boolean identities based on the EQV function.
                 Erasable programmable read-only memory (EPROM): a ROM that can be program-
                    med many times.
                 Error catching: a serious problem in a JK master/slave flip-flop where a 1 or 0 is caught
                    in the master cell when clock is active and is issued to the slave cell output when clock
                    goes inactive.
                 Essential hazard: a disruptive sequential hazard that can occur as a result of an explicitly
                    located delay in an asynchronous FSM that has at least three states and that is operated
                    in the fundamental mode.
                 Essential prime implicant (EPI): a prime implicant that must be used to achieve mini-
                    mum cover.
                 EU: execution unit.
                 EV: entered variable.
                 EV K-map: a K-map that contains EVs.
                 EV truth table: a truth table containing EVs.
                 Even parity: an even number of 1's (or O's) in a binary word depending on how even
                    parity is defined.
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