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1.4 GLOSSARY OF TERMS, EXPRESSIONS, AND ABBREVIATIONS 29
Universal shift register: a shift register capable of performing PIPO, PISO, SIPO, and
SISO operations in addition to being capable of performing the true hold condition.
Unstable state: any logic state in an asynchronous FSM that does not satisfy the stability
criteria.
Unweighted code: a code that cannot be constructed by any mathematical weighting
procedure.
USR: universal shift register.
UVEPROM: ultraviolet erasable PROM.
VEM: variable entered map.
Very large scale integrated circuits: 1C chips that contain thousands to millions of gates.
VHDL: VHSIC hardware description language.
VHSIC: very high speed integrated circuit.
VLSI: very large scale integrated circuits.
Voltage, V: the potential difference between two points, in units of volts (V). Also, the
work required to move a positive charge against an electric field.
Voltage waveform: a voltage waveform in which rise and fall times exist.
Weighted code: a binary code in which the bit positions are weighted with different
mathematically determined values.
Wired logic: an arrangement of logic circuits in which the outputs are physically con-
nected to form an "implied" AND or OR function.
WSI circuits: wafer-scale integrated circuits.
XNOR: (see Equivalence and EQV)
XOR: exclusive OR.
XOR function: the function that derives from the definition of exclusive OR.
XOR gate: a physical device that performs the electrical equivalent of the XOR function.
XOR laws: a set of Boolean identities that are based on the XOR function.
XOR pattern: any of four possible K-map patterns that result in XOR type functions.
XS3 code: BCD code plus three.
ZBI: zero-blanking input.
ZBO: zero-blanking output.
Zero banking: a feature of a BCD-to-seven-segment conversion that blanks out the seven-
segment display if all inputs are zero.