Page 144 - Hardware Implementation of Finite-Field Arithmetic

Operations over Z [ x ]/ f ( x ) 127
p

a f a f a f f
m–2 m–1 m–3 m–2 0 1 0
a
... m–1
0
mod p mod p mod p mod p
multiplier multiplier multiplier multiplier

mod p mod p mod p mod p
subtractor subtractor subtractor subtractor

next_a next_a next_a next_a
m–1 m–2 1 0
c m–1 a m–1 c m–2 a m–2 c 1 a 1 c 0 a 0 b i
...

k-bit by k-bits k-bit by k-bits k-bit by k-bits k-bit by k-bits
multiplier multiplier multiplier multiplier

adder adder adder adder
2k bits 2k bits 2k bits 2k bits
mod p mod p mod p mod p
reducer reducer reducer reducer

next_c next_c next_c next_c
m–1 m–2 1 0
FIGURE 5.3 LSE-fi rst multiplier datapath.

next_a_calc: for i in 1 to m-1 generate
mult_f_x_a(i) <= F(i) * int_a(M-1);
comp1: mod_239_reducer port map (mult_f_x_a(i),
mult_sub(i));
comp2:subtractor_mod_P port map (int_a(i-1),
mult_sub(i), next_a(i));
end generate;
mult_f_x_a(0) <= ( F(0) * int_a(M-1) );
comp1: mod_239_reducer port map(mult_f_x_a(0),
mult_sub(0));
comp2: subtractor_mod_P port map(ZERO, mult_sub(0),
next_a(0));
registers_abc: process(clk)
begin
if clk’event and clk = ‘1’ then